Lines Matching defs:softsp
244 sysio_err_uninit(struct sbus_soft_state *softsp);
247 iommu_uninit(struct sbus_soft_state *softsp);
250 stream_buf_uninit(struct sbus_soft_state *softsp);
267 sbus_ctlops_poke(struct sbus_soft_state *softsp, peekpoke_ctlops_t *in_args);
270 sbus_ctlops_peek(struct sbus_soft_state *softsp, peekpoke_ctlops_t *in_args,
274 sbus_init(struct sbus_soft_state *softsp, caddr_t address);
277 sbus_resume_init(struct sbus_soft_state *softsp, int resume);
444 struct sbus_soft_state *softsp;
462 softsp = ddi_get_soft_state(sbusp, instance);
464 if ((error = iommu_resume_init(softsp)) != DDI_SUCCESS)
467 if ((error = sbus_resume_init(softsp, 1)) != DDI_SUCCESS)
470 if ((error = stream_buf_resume_init(softsp)) != DDI_SUCCESS)
480 softsp->intr_mapping_reg, 0);
493 softsp = ddi_get_soft_state(sbusp, instance);
496 softsp->dip = devi;
498 if ((softsp->upa_id = (int)ddi_getprop(DDI_DEV_T_ANY, softsp->dip,
528 if (ddi_regs_map_setup(softsp->dip, 0, &softsp->address, 0, 0,
529 &attr, &softsp->ac) != DDI_SUCCESS) {
531 ddi_get_name(softsp->dip),
532 ddi_get_instance(softsp->dip));
535 if (softsp->address == (caddr_t)-1) {
537 ddi_get_instance(softsp->dip));
541 DPRINTF(SBUS_ATTACH_DEBUG, ("sbus: devi=0x%p, softsp=0x%p\n",
542 (void *)devi, (void *)softsp));
558 if ((rv = ddi_map_regs(softsp->dip, 0, &addr,
569 if ((error = iommu_init(softsp, softsp->address)) != DDI_SUCCESS)
572 if ((error = sbus_init(softsp, softsp->address)) != DDI_SUCCESS)
575 if ((error = sysio_err_init(softsp, softsp->address)) != DDI_SUCCESS)
578 if ((error = stream_buf_init(softsp, softsp->address)) != DDI_SUCCESS)
582 mutex_init(&softsp->pokefault_mutex, NULL, MUTEX_SPIN,
585 sbus_add_kstats(softsp);
605 struct sbus_soft_state *softsp;
624 softsp = ddi_get_soft_state(sbusp, instance);
627 softsp->intr_mapping_reg, 1);
641 struct sbus_soft_state *softsp;
644 softsp = ddi_get_soft_state(sbusp, instance);
645 ASSERT(softsp != NULL);
652 if (stream_buf_uninit(softsp) == DDI_FAILURE) {
657 if (sysio_err_uninit(softsp) == DDI_FAILURE) {
662 if (iommu_uninit(softsp)) {
667 if (softsp->ac) {
668 ddi_regs_map_free(&softsp->ac);
669 softsp->address = NULL;
675 if (softsp->sbus_counters_ksp != (kstat_t *)NULL)
676 kstat_delete(softsp->sbus_counters_ksp);
698 pc_ittrans_uninit(softsp->ittrans_cookie);
710 sbus_init(struct sbus_soft_state *softsp, caddr_t address)
727 softsp->sysio_ctrl_reg = REG_ADDR(address, OFF_SYSIO_CTRL_REG);
728 softsp->sbus_ctrl_reg = REG_ADDR(address, OFF_SBUS_CTRL_REG);
729 softsp->sbus_slot_config_reg = REG_ADDR(address, OFF_SBUS_SLOT_CONFIG);
730 softsp->intr_mapping_reg = REG_ADDR(address, OFF_INTR_MAPPING_REG);
731 softsp->clr_intr_reg = REG_ADDR(address, OFF_CLR_INTR_REG);
732 softsp->intr_retry_reg = REG_ADDR(address, OFF_INTR_RETRY_REG);
733 softsp->sbus_intr_state = REG_ADDR(address, OFF_SBUS_INTR_STATE_REG);
734 softsp->sbus_pcr = REG_ADDR(address, OFF_SBUS_PCR);
735 softsp->sbus_pic = REG_ADDR(address, OFF_SBUS_PIC);
740 "SBUS Control reg: 0x%p", (void *)softsp->sysio_ctrl_reg,
741 (void *)softsp->sbus_ctrl_reg));
745 pc_ittrans_init(softsp->upa_id, &softsp->ittrans_cookie);
748 softsp->intr_mapping_ign =
749 UPAID_TO_IGN(softsp->upa_id) << IMR_IGN_SHIFT;
752 softsp->obio_intr_state = softsp->sbus_intr_state + 1;
754 (void) sbus_resume_init(softsp, 0);
761 softsp->sbus_slave_burstsizes[i] = 0xffffffffu;
777 numproxy = ddi_prop_get_int(DDI_DEV_T_ANY, softsp->dip,
781 set_intr_mapping_reg(softsp->upa_id,
782 (uint64_t *)(softsp->intr_mapping_reg +
786 set_intr_mapping_reg(softsp->upa_id,
787 (uint64_t *)(softsp->intr_mapping_reg +
808 sbus_resume_init(struct sbus_soft_state *softsp, int resume)
827 *softsp->sysio_ctrl_reg &= 0xFF0FFFFFFFFFFFFFULL;
828 *softsp->sysio_ctrl_reg |= tmpconst << 51;
835 *softsp->sysio_ctrl_reg |=
836 (uint64_t)STARFIRE_UPAID2HWIGN(softsp->upa_id)
840 *softsp->sysio_ctrl_reg |=
841 (uint64_t)softsp->upa_id << 51;
844 *softsp->sysio_ctrl_reg |=
845 (uint64_t)softsp->upa_id << SYSIO_IGN;
852 *softsp->sbus_ctrl_reg |= SBUS_ARBIT_ALL;
858 sbus_burst_sizes = ddi_getprop(DDI_DEV_T_ANY, softsp->dip,
861 softsp->sbus_burst_sizes = sbus_burst_sizes & SYSIO_BURST_MASK;
862 softsp->sbus64_burst_sizes = sbus_burst_sizes & SYSIO64_BURST_MASK;
870 config = softsp->sbus_slot_config_reg + i;
877 tmpreg = *softsp->sbus_ctrl_reg;
893 if (softsp->sbus_slave_burstsizes[i] != 0xffffffffu) {
894 config = softsp->sbus_slot_config_reg + i;
896 if (softsp->sbus_slave_burstsizes[i] &
900 softsp->sbus_slave_burstsizes[i] >>
907 softsp->sbus_slave_burstsizes[i] &
919 tmpreg = *softsp->sbus_ctrl_reg;
1157 struct sbus_soft_state *softsp = (struct sbus_soft_state *)
1213 slot_reg = softsp->sbus_slot_config_reg + slot;
1236 if (((softsp->sbus_slave_burstsizes[slot] &
1238 ((softsp->sbus_slave_burstsizes[slot] & 0xffff) != 0)) {
1256 softsp->sbus_slave_burstsizes[slot] &=
1263 if (softsp->sbus_slave_burstsizes[slot] &
1266 burstsizes = softsp->sbus_slave_burstsizes[slot] >>
1276 if (softsp->sbus_slave_burstsizes[slot] &
1279 softsp->sbus_slave_burstsizes[slot] &
1335 sbus_ctlops_poke(struct sbus_soft_state *softsp, peekpoke_ctlops_t *in_args)
1345 mutex_enter(&softsp->pokefault_mutex);
1346 softsp->ontrap_data = &otd;
1360 tmpreg = *softsp->sbus_ctrl_reg;
1368 tmpreg = *softsp->sbus_err_reg;
1370 tmpreg = *softsp->sbus_err_reg;
1375 softsp->ontrap_data = NULL;
1376 mutex_exit(&softsp->pokefault_mutex);
1387 sbus_ctlops_peek(struct sbus_soft_state *softsp, peekpoke_ctlops_t *in_args,
1420 struct sbus_soft_state *softsp = (struct sbus_soft_state *)
1442 (1 << (ddi_fls(softsp->sbus_burst_sizes) - 1)));
1445 (1 << (ddi_ffs(softsp->sbus_burst_sizes) - 1)));
1508 &pri, softsp->intr_mapping_ign);
1559 return (sbus_ctlops_poke(softsp, (peekpoke_ctlops_t *)arg));
1562 return (sbus_ctlops_peek(softsp, (peekpoke_ctlops_t *)arg,
1618 spurious_cntr = &intr_info->softsp->spurious_cntrs[intr_info->pil];
1646 tmpreg = *intr_info->softsp->sbus_ctrl_reg;
1649 tmpreg = *intr_info->softsp->sbus_ctrl_reg;
1685 struct sbus_soft_state *softsp = (struct sbus_soft_state *)
1715 &hdlp->ih_pri, softsp->intr_mapping_ign) == DDI_FAILURE) {
1723 mondo_vec_reg = (softsp->intr_mapping_reg +
1733 intr_state_reg = softsp->obio_intr_state;
1736 intr_state_reg = softsp->sbus_intr_state;
1754 mutex_enter(&softsp->intr_poll_list_lock);
1756 sbus_arg = softsp->intr_list[ino];
1763 tmpreg = *softsp->sbus_ctrl_reg;
1787 softsp->intr_list[ino] = sbus_arg;
1788 sbus_arg->clear_reg = (softsp->clr_intr_reg +
1792 sbus_arg->softsp = softsp;
1816 mutex_exit(&softsp->intr_poll_list_lock);
1821 (softsp->intr_hndlr_cnt[slot] == 0)) {
1826 softsp->ittrans_cookie, cpu_id,
1854 softsp->intr_hndlr_cnt[slot]++;
1856 mutex_exit(&softsp->intr_poll_list_lock);
1869 softsp->intr_hndlr_cnt[slot]));
1881 tmpreg = *softsp->sbus_ctrl_reg;
1929 struct sbus_soft_state *softsp = (struct sbus_soft_state *)
1935 mutex_enter(&softsp->intr_poll_list_lock);
1939 &hdlp->ih_pri, softsp->intr_mapping_ign) == DDI_FAILURE) {
1947 mondo_vec_reg = (softsp->intr_mapping_reg +
1953 tmpreg = *softsp->sbus_ctrl_reg;
1959 intr_state_reg = softsp->obio_intr_state;
1962 intr_state_reg = softsp->sbus_intr_state;
1976 sbus_arg = softsp->intr_list[ino];
1979 softsp->intr_hndlr_cnt[slot]--;
1982 "ino 0x%x, sbus_arg 0x%p intr cntr %d\n", (void *)softsp,
1984 softsp->intr_hndlr_cnt[slot]));
1998 if (softsp->intr_hndlr_cnt[slot] > 0) {
2001 tmpreg = *softsp->sbus_ctrl_reg;
2005 if ((softsp->intr_hndlr_cnt[slot] == 0) || (slot >= EXT_SBUS_SLOTS)) {
2009 pc_ittrans_cleanup(softsp->ittrans_cookie, mondo_vec_reg);
2019 softsp->intr_list[ino] = NULL;
2023 mutex_exit(&softsp->intr_poll_list_lock);
2112 struct sbus_soft_state *softsp = (struct sbus_soft_state *)
2131 softsp->intr_mapping_ign);
2216 struct sbus_soft_state *softsp;
2228 softsp = ddi_get_soft_state(sbusp, ddi_get_instance(dip));
2235 mondo_vec_reg = (softsp->intr_mapping_reg +
2268 tmpreg = *softsp->sbus_ctrl_reg;
2276 intr_state_reg = softsp->obio_intr_state;
2293 intr_state_reg = softsp->sbus_intr_state;
2319 mondo_vec = (pc_translate_tgtid(softsp->ittrans_cookie,
2351 struct sbus_soft_state *softsp;
2355 softsp = ddi_get_soft_state(sbusp, ddi_get_instance(dip));
2364 mondo_clear_reg = (softsp->clr_intr_reg +
2386 * set to ddi_get_instance(softsp->dip).
2494 sbus_add_kstats(struct sbus_soft_state *softsp)
2507 sbus_add_picN_kstats(softsp->dip);
2520 ddi_get_instance(softsp->dip), "counters",
2525 " failed", ddi_get_instance(softsp->dip));
2543 sbus_counters_ksp->ks_private = (void *)softsp;
2548 softsp->sbus_counters_ksp = sbus_counters_ksp;
2555 struct sbus_soft_state *softsp;
2559 softsp = (struct sbus_soft_state *)ksp->ks_private;
2564 * Write the pcr value to the softsp->sbus_pcr.
2569 *softsp->sbus_pcr =
2582 sbus_counters_data[0].value.ui64 = *softsp->sbus_pcr >> 4;
2584 pic_register = *softsp->sbus_pic;
2605 struct sbus_soft_state *softsp = (struct sbus_soft_state *)
2613 &hdlp->ih_pri, softsp->intr_mapping_ign) == DDI_FAILURE) {
2620 sbus_arg = softsp->intr_list[ino];