Lines Matching defs:os3
178 * os1, os2, os3: scratch registers, may be out
181 #define SERVE_INTR_PRE(iv_p, cpu, ls1, ls2, os1, os2, os3, regs) \
184 SERVE_INTR_TRACE(iv_p, os1, os2, os3, regs);
191 * After calling SERVE_INTR, the caller must check if os3 is set. If
197 * handler. However, the values of ls1 and os3 *must* be preserved and
204 * os3 - if set, another interrupt needs to be processed
205 * cpu, ls1, os3 - must be preserved if os3 is set
208 #define SERVE_INTR(os5, cpu, ls1, ls2, os1, os2, os3, os4) \
223 ldx [cpu + os2], os3; \
224 inc os3; \
225 stx os3, [cpu + os2]; \
229 ldn [os1], os3;
235 * ls1, os3 - preserved from prior call to SERVE_INTR
239 #define SERVE_INTR_NEXT(os5, cpu, ls1, ls2, os1, os2, os3, os4) \
244 lduh [os3 + IV_FLAGS], os2; \
247 add os3, IV_PIL_NEXT, os2; \
259 5: lduh [os3 + IV_FLAGS], ls1; \
261 sth ls1, [os3 + IV_FLAGS]; \
264 mov os3, ls1; \
265 mov os3, ls2; \
266 SERVE_INTR_TRACE2(os5, os1, os2, os3, os4);
272 #define SERVE_INTR_TRACE(inum, os1, os2, os3, os4) \
273 rdpr %pstate, os3; \
274 andn os3, PSTATE_IE | PSTATE_AM, os2; \
281 mov os3, os4; \
282 GET_TRACE_TICK(os2, os3); \
286 rdpr %pil, os3; \
287 or os2, os3, os2; \
295 TRACE_NEXT(os1, os2, os3); \
298 #define SERVE_INTR_TRACE(inum, os1, os2, os3, os4)
305 #define SERVE_INTR_TRACE2(inum, os1, os2, os3, os4) \
306 rdpr %pstate, os3; \
307 andn os3, PSTATE_IE | PSTATE_AM, os2; \
312 mov os3, os4; \
313 GET_TRACE_TICK(os2, os3); \
317 rdpr %pil, os3; \
318 or os2, os3, os2; \
326 TRACE_NEXT(os1, os2, os3); \
329 #define SERVE_INTR_TRACE2(inum, os1, os2, os3, os4)