Lines Matching defs:rd
215 #define FBT_ORLO(rs, val, rd) \
217 ((rd) << FBT_FMT3_RD_SHIFT) | FBT_FMT3_IMM | ((val) & FBT_IMM10_MASK))
219 #define FBT_ORSIMM13(rs, val, rd) \
221 ((rd) << FBT_FMT3_RD_SHIFT) | FBT_FMT3_IMM | ((val) & FBT_SIMM13_MASK))
223 #define FBT_ADDSIMM13(rs, val, rd) \
225 ((rd) << FBT_FMT3_RD_SHIFT) | FBT_FMT3_IMM | ((val) & FBT_SIMM13_MASK))
227 #define FBT_ADD(rs1, rs2, rd) \
229 ((rs2) << FBT_FMT3_RS2_SHIFT) | ((rd) << FBT_FMT3_RD_SHIFT))
235 #define FBT_MOV(rs, rd) \
237 ((rs) << FBT_FMT3_RS2_SHIFT) | ((rd) << FBT_FMT3_RD_SHIFT))
249 #define FBT_SAVEIMM(rd, val, rs1) \
251 ((rd) << FBT_FMT3_RD_SHIFT) | FBT_FMT3_IMM | ((val) & FBT_SIMM13_MASK))
253 #define FBT_RESTORE(rd, rs1, rs2) \
255 ((rd) << FBT_FMT3_RD_SHIFT) | ((rs2) << FBT_FMT3_RS2_SHIFT))
273 * We're only going to treat a save as safe if (a) both rs1 and rd are
513 * (b) jmpl rs1 + (rs2 | offset), rd
514 * restore rs1, rs2 | imm, rd
517 * restore rs1, rs2 | imm, rd
520 * or delay is a DCTI, we fail. If rd from the jmpl in (b) is something other
530 * restore ls0, ls1, rd
542 int rd;
584 * its return value (e.g. "rd %pc, %o0" in the slot).
606 rd = FBT_FMT3_RD(*instr);
608 if (rd == FBT_REG_I7 || rd == FBT_REG_O7 || rd == FBT_REG_G0)
638 uint32_t op, rd;
641 rd = FBT_FMT3_RD(delay);
643 if (op != FBT_OP2 || rd != FBT_REG_O7) {
913 * Now we need to check the rd and source register for the jmpl;
914 * If neither rd nor the source register is %o7, then we might