Lines Matching defs:up
275 #define _MCREG_FIELD(up, revsuffix, field) ((up)->_fmt_##revsuffix.field)
277 #define MCREG_VAL32(up) ((up)->_val32)
282 #define MCREG_FIELD_CMN(up, field) _MCREG_FIELD(up, cmn, field)
287 #define MCREG_FIELD_F_preF(up, field) _MCREG_FIELD(up, f_preF, field)
292 #define MCREG_FIELD_F_revFG(up, field) _MCREG_FIELD(up, f_revFG, field)
297 #define MCREG_FIELD_10_revAB(up, field) _MCREG_FIELD(up, 10_revAB, field)
338 #define HT_COHERENTNODES(up) (MCREG_FIELD_CMN(up, NodeCnt) + 1)
339 #define HT_SYSTEMCORECOUNT(up) (MCREG_FIELD_CMN(up, CpuCnt) + 1)
373 #define MC_DRAMBASE(up) ((uint64_t)MCREG_FIELD_CMN(up, DRAMBasei) << 24)
391 #define MC_DRAMLIM(up) \
392 ((uint64_t)MCREG_FIELD_CMN(up, DRAMLimiti) << 24 | \
393 (MCREG_FIELD_CMN(up, DRAMLimiti) ? ((1 << 24) - 1) : 0))
410 #define MC_DRAMHOLE_SIZE(up) (MCREG_FIELD_CMN(up, DramHoleOffset) << 24)
443 #define MC_CSBASE(up, rev) (MC_REV_MATCH(rev, MC_F_REVS_FG) ? \
444 (uint64_t)MCREG_FIELD_F_revFG(up, BaseAddrHi) << 27 | \
445 (uint64_t)MCREG_FIELD_F_revFG(up, BaseAddrLo) << 13 : \
446 (uint64_t)MCREG_FIELD_F_preF(up, BaseAddrHi) << 25 | \
447 (uint64_t)MCREG_FIELD_F_preF(up, BaseAddrLo) << 13)
485 #define MC_CSMASK(up, rev) (MC_REV_MATCH(rev, MC_F_REVS_FG) ? \
486 (uint64_t)MCREG_FIELD_F_revFG(up, AddrMaskHi) << 27 | \
487 (uint64_t)MCREG_FIELD_F_revFG(up, AddrMaskLo) << 13 | 0x7c01fff : \
488 (uint64_t)MCREG_FIELD_F_preF(up, AddrMaskHi) << 25 | \
489 (uint64_t)MCREG_FIELD_F_preF(up, AddrMaskLo) << 13 | 0x1f01fff)
531 #define MC_CSBANKMODE(up, csnum) ((up)->_fmt_bankmodes.allcsmodes >> \
825 #define _MCMSR_FIELD(up, revsuffix, field) ((up)->_fmt_##revsuffix.field)
827 #define MCMSR_VAL(up) ((up)->_val64)
829 #define MCMSR_FIELD_CMN(up, field) _MCMSR_FIELD(up, cmn, field)
830 #define MCMSR_FIELD_F_preF(up, field) _MCMSR_FIELD(up, f_preF, field)
831 #define MCMSR_FIELD_F_revFG(up, field) _MCMSR_FIELD(up, f_revFG, field)
832 #define MCMSR_FIELD_10_revAB(up, field) _MCMSR_FIELD(up, 10_revAB, field)