Lines Matching defs:va
134 xen_flush_va(caddr_t va)
140 mmu_tlbflush_entry((caddr_t)va);
143 t.arg1.linear_addr = (uintptr_t)va;
151 xen_gflush_va(caddr_t va, cpuset_t cpus)
157 mmu_tlbflush_entry((caddr_t)va);
162 t.arg1.linear_addr = (uintptr_t)va;
254 xen_map(uint64_t pte, caddr_t va)
256 if (HYPERVISOR_update_va_mapping((uintptr_t)va, pte,
442 uintptr_t va;
473 for (e = 0, va = ht->ht_vaddr;
476 ++e, va += MMU_PAGESIZE) {
1181 uintptr_t va;
1188 va = ht->ht_vaddr;
1190 hashval = HTABLE_HASH(hat, va, level);
1222 (hat != kas.a_hat || va >= kernelbase))
1247 unlink_ptp(higher, ht, va);
1614 uintptr_t va = *vap & LEVEL_MASK(l);
1617 ASSERT(va >= ht->ht_vaddr);
1618 ASSERT(va <= HTABLE_LAST_PAGE(ht));
1623 e = htable_va2entry(va, ht);
1633 va += pgsize;
1634 if (va >= eaddr)
1645 if (va < eaddr && pte_ptr != end_pte_ptr)
1653 if (l == mmu.max_level && va >= mmu.hole_start && va <= mmu.hole_end)
1654 va = mmu.hole_end + va - mmu.hole_start;
1657 *vap = va;
1677 uintptr_t va = *vaddr;
1684 ASSERT(eaddr > va);
1701 ASSERT(prev->ht_vaddr <= va);
1703 if (va <= HTABLE_LAST_PAGE(prev)) {
1704 pte = htable_scan(prev, &va, eaddr);
1707 *vaddr = va;
1732 while (va < eaddr && va >= *vaddr) {
1737 ht = htable_lookup(hat, va, l);
1739 pte = htable_scan(ht, &va, eaddr);
1741 VERIFY(!IN_VA_HOLE(va));
1742 *vaddr = va;
1757 va = NEXT_ENTRY_VA(va, l + 1);
1758 if (va >= eaddr)
1855 htable_va2entry(uintptr_t va, htable_t *ht)
1859 ASSERT(va >= ht->ht_vaddr);
1860 ASSERT(va <= HTABLE_LAST_PAGE(ht));
1861 return ((va >> LEVEL_SHIFT(l)) & (HTABLE_NUM_PTES(ht) - 1));
1872 uintptr_t va;
1875 va = ht->ht_vaddr + ((uintptr_t)entry << LEVEL_SHIFT(l));
1881 if (ht->ht_level == mmu.max_level && va >= mmu.hole_start)
1882 va += ((mmu.hole_end - mmu.hole_start) + 1);
1885 return (va);
1968 caddr_t va = kbm_remap_window(pfn_to_pa(pfn), 1);
1969 return (PT_INDEX_PTR(va, index));
2049 uintptr_t va;
2055 va = (uintptr_t)PWIN_VA(PWIN_TABLE(CPU->cpu_id));
2056 (void) HYPERVISOR_update_va_mapping(va, 0,