Lines Matching defs:slave

451  * If the slave is discovered to have a skew, gethrtimef will be changed to
453  * the master and slave TSCs are read simultaneously; however, there is no
456  * management. The slave CPU continuously reads TSC and then reads a global
458  * the slave's visibility (being forced by an mfence operation) we use the TSC
459  * reading taken on the slave. A corresponding TSC read will be taken on the
461  * delay between causing the slave to notice the invalid cache line and the
478 tsc_sync_master(processorid_t slave)
517 				 * after the slave noticed the cache line
524 			tsc_sync_tick_delta[slave] =
580 			 * if the master and slave are really the same
582 			 * to yield to the slave as quickly as possible here,