Lines Matching defs:hip

48 static int hpet_start_main_counter(hpet_info_t *hip);
49 static int hpet_stop_main_counter(hpet_info_t *hip);
50 static uint64_t hpet_read_main_counter_value(hpet_info_t *hip);
51 static uint64_t hpet_set_leg_rt_cnf(hpet_info_t *hip, uint32_t new_value);
52 static uint64_t hpet_read_gen_cap(hpet_info_t *hip);
53 static uint64_t hpet_read_gen_config(hpet_info_t *hip);
54 static uint64_t hpet_read_gen_intrpt_stat(hpet_info_t *hip);
55 static uint64_t hpet_read_timer_N_config(hpet_info_t *hip, uint_t n);
57 static void hpet_write_gen_config(hpet_info_t *hip, uint64_t l);
58 static void hpet_write_gen_intrpt_stat(hpet_info_t *hip, uint64_t l);
59 static void hpet_write_timer_N_config(hpet_info_t *hip, uint_t n, uint64_t l);
60 static void hpet_write_timer_N_comp(hpet_info_t *hip, uint_t n, uint64_t l);
61 static void hpet_disable_timer(hpet_info_t *hip, uint32_t timer_n);
62 static void hpet_enable_timer(hpet_info_t *hip, uint32_t timer_n);
63 static int hpet_get_IOAPIC_intr_capable_timer(hpet_info_t *hip);
66 static void hpet_timer_set_up(hpet_info_t *hip, uint32_t timer_n,
413 hpet_start_main_counter(hpet_info_t *hip)
418 gcr_ptr = (uint64_t *)HPET_GEN_CONFIG_ADDRESS(hip->logical_address);
429 hpet_stop_main_counter(hpet_info_t *hip)
434 gcr_ptr = (uint64_t *)HPET_GEN_CONFIG_ADDRESS(hip->logical_address);
451 hpet_set_leg_rt_cnf(hpet_info_t *hip, uint32_t new_value)
453 uint64_t gen_conf = hpet_read_gen_config(hip);
468 hpet_write_gen_config(hip, gen_conf);
473 hpet_read_gen_cap(hpet_info_t *hip)
475 return (*(uint64_t *)HPET_GEN_CAP_ADDRESS(hip->logical_address));
479 hpet_read_gen_config(hpet_info_t *hip)
482 HPET_GEN_CONFIG_ADDRESS(hip->logical_address));
486 hpet_read_gen_intrpt_stat(hpet_info_t *hip)
488 hip->gen_intrpt_stat = *(uint64_t *)HPET_GEN_INTR_STAT_ADDRESS(
489 hip->logical_address);
490 return (hip->gen_intrpt_stat);
494 hpet_read_timer_N_config(hpet_info_t *hip, uint_t n)
497 hip->logical_address, n);
498 hip->timer_n_config[n] = hpet_convert_timer_N_config(conf);
523 hpet_read_main_counter_value(hpet_info_t *hip)
529 counter = (uint32_t *)HPET_MAIN_COUNTER_ADDRESS(hip->logical_address);
534 if (hip->gen_cap.count_size_cap == 0) {
536 hip->main_counter_value = value;
552 hip->main_counter_value = value;
557 hpet_write_gen_config(hpet_info_t *hip, uint64_t l)
559 *(uint64_t *)HPET_GEN_CONFIG_ADDRESS(hip->logical_address) = l;
563 hpet_write_gen_intrpt_stat(hpet_info_t *hip, uint64_t l)
565 *(uint64_t *)HPET_GEN_INTR_STAT_ADDRESS(hip->logical_address) = l;
569 hpet_write_timer_N_config(hpet_info_t *hip, uint_t n, uint64_t l)
571 if (hip->timer_n_config[n].size_cap == 1)
573 hip->logical_address, n) = l;
576 hip->logical_address, n) = (uint32_t)(0xFFFFFFFF & l);
580 hpet_write_timer_N_comp(hpet_info_t *hip, uint_t n, uint64_t l)
582 *(uint64_t *)HPET_TIMER_N_COMP_ADDRESS(hip->logical_address, n) = l;
586 hpet_disable_timer(hpet_info_t *hip, uint32_t timer_n)
590 l = hpet_read_timer_N_config(hip, timer_n);
592 hpet_write_timer_N_config(hip, timer_n, l);
596 hpet_enable_timer(hpet_info_t *hip, uint32_t timer_n)
600 l = hpet_read_timer_N_config(hip, timer_n);
602 hpet_write_timer_N_config(hip, timer_n, l);
633 hpet_get_IOAPIC_intr_capable_timer(hpet_info_t *hip)
639 timer < hip->gen_cap.num_tim_cap; ++timer) {
641 if (!hpet_timer_available(hip->allocated_timers, timer))
644 intr = lowbit(hip->timer_n_config[timer].int_route_cap) - 1;
646 hpet_timer_alloc(&hip->allocated_timers, timer);
647 hip->cstate_timer.timer = timer;
648 hip->cstate_timer.intr = intr;
679 hpet_timer_set_up(hpet_info_t *hip, uint32_t timer_n, uint32_t interrupt)
683 conf = hpet_read_timer_N_config(hip, timer_n);
696 hpet_write_timer_N_config(hip, timer_n, conf);
717 hpet_timer_program(hpet_info_t *hip, uint32_t timer, uint64_t delta)
721 program = hpet_read_main_counter_value(hip);
723 hpet_write_timer_N_comp(hip, timer, program);
725 time = hpet_read_main_counter_value(hip);