Lines Matching defs:phy
969 /* stop the phy timer */
1301 DBG(DPHY, "phy at %d: %x,%x", phyaddr, phyidr1, phyidr2);
1311 DBG(DPHY, "resetting phy");
1313 /* we reset the phy block */
1329 mxfe_error(mxfep->mxfe_dip, "timeout waiting on phy to reset");
1333 DBG(DPHY, "phy reset complete");
1591 mxfe_miiread(mxfe_t *mxfep, int phy, int reg)
1595 return (mxfe_miiread98713(mxfep, phy, reg));
1602 mxfe_miireadgeneral(mxfe_t *mxfep, int phy, int reg)
1620 /* next we send the 5 bit phy address */
1622 mxfe_miiwritebit(mxfep, (phy & i) ? 1 : 0);
1644 mxfe_miiread98713(mxfe_t *mxfep, int phy, int reg)
1654 retval = mxfe_miireadgeneral(mxfep, phy, reg);
1660 mxfe_miiwrite(mxfe_t *mxfep, int phy, int reg, uint16_t val)
1664 mxfe_miiwrite98713(mxfep, phy, reg, val);
1672 mxfe_miiwritegeneral(mxfe_t *mxfep, int phy, int reg, uint16_t val)
1689 /* next we send the 5 bit phy address */
1691 mxfe_miiwritebit(mxfep, (phy & i) ? 1 : 0);
1713 mxfe_miiwrite98713(mxfe_t *mxfep, int phy, int reg, uint16_t val)
1722 mxfe_miiwritegeneral(mxfep, phy, reg, val);
1863 /* stop the phy */
1882 /* start up the phy */
2981 if (*capp == 0) /* ensure phy can support value */
2993 * This re-initializes the phy, but it also