Lines Matching defs:sge
64 #include "sge.h"
92 static inline uint32_t t1_sge_rx(pesge *sge, freelQ_t *Q,
95 static void t1_sge_check_pause(pesge *sge, struct freelQ *Q);
97 static void alloc_freelQ_buffers(pesge *sge, struct freelQ *Q);
98 static void freelQs_empty(pesge *sge);
99 static void free_cmdQ_buffers(pesge *sge, cmdQ_t *Q, uint32_t credits_pend);
100 static int alloc_rx_resources(pesge *sge, struct sge_params *p);
101 static int alloc_tx_resources(pesge *sge, struct sge_params *p);
104 static void configure_sge(pesge *sge, struct sge_params *p);
105 static void free_freelQ_buffers(pesge *sge, struct freelQ *Q);
106 static void free_rx_resources(pesge *sge);
107 static void free_tx_resources(pesge *sge);
108 static inline unsigned int jumbo_payload_capacity(pesge *sge);
119 static inline void sge_ring_doorbell(pesge *sge, u32 control_reg);
122 sge_ring_doorbell(pesge *sge, u32 control_reg)
125 t1_write_reg_4(sge->obj, A_SG_DOORBELL, control_reg);
137 pesge *sge;
139 sge = t1_os_malloc_wait_zero(sizeof (pesge));
141 if (sge == NULL)
144 memset(sge, 0, sizeof (*sge));
152 sge->ptimeout = 1;
154 sge->obj = sa;
156 if (sge_kstat_setup(sge) != 0)
173 cmn_err(CE_NOTE, "sge: %p\n", sge);
174 cmn_err(CE_NOTE, "&sge->cmdQ[0]: %p\n", &sge->cmdQ[0]);
175 cmn_err(CE_NOTE, "&sge->freelQ[0]: %p\n", &sge->freelQ[0]);
176 cmn_err(CE_NOTE, "&sge->freelQ[1]: %p\n", &sge->freelQ[1]);
177 cmn_err(CE_NOTE, "&sge->respQ: %p\n", &sge->respQ);
178 cmn_err(CE_NOTE, "&sge->intr_cnt: %p\n", &sge->intr_cnt);
184 t1_os_free(sge, sizeof (pesge));
185 sge = NULL;
188 return (sge);
192 t1_sge_destroy(pesge* sge)
194 if (sge != NULL) {
195 free_tx_resources(sge);
196 free_rx_resources(sge);
199 if ((is_T2(sge->obj)) && (sge->pskb))
200 pe_free_fake_arp(sge->pskb);
202 sge_kstat_remove(sge);
204 t1_os_free(sge, sizeof (pesge));
230 pesge *sge = adapter->sge;
231 ch_t *chp = (ch_t *)sge->obj;
235 atomic_read(&sge->cmdQ[0].cq_asleep)) {
240 if (sge->pskb)
241 rv = pe_start(adapter, (mblk_t *)sge->pskb,
244 sge->intr_cnt.arp_sent++;
254 t1_sge_check_pause(sge, &sge->freelQ[0]);
255 t1_sge_check_pause(sge, &sge->freelQ[1]);
262 sge_start(pesge *sge)
264 t1_write_reg_4(sge->obj, A_SG_CONTROL, sge->sge_control);
266 ch_init_cyclic(sge->obj, &sge->espi_wa_cyclic,
267 (void (*)(void *))t1_espi_workaround, sge->obj);
268 ch_start_cyclic(&sge->espi_wa_cyclic, sge->ptimeout);
276 sge_stop(pesge *sge)
281 DBGASSERT(sge);
284 t1_write_reg_4(sge->obj, A_SG_CONTROL, 0x0);
289 status = t1_read_reg_4(sge->obj, A_SG_INT_CAUSE);
290 t1_write_reg_4(sge->obj, A_SG_INT_CAUSE, status);
295 ch_stop_cyclic(&sge->espi_wa_cyclic);
303 sge_data_out(pesge* sge, int qid, mblk_t *m0,
306 struct cmdQ *Q = &sge->cmdQ[qid];
307 ddi_dma_handle_t dh = (ddi_dma_handle_t)sge->cmdQ[qid].cq_dh;
350 sge->do_udp_csum = 3;
351 } else if ((flg & CH_UDP) && (sge->do_udp_csum != 0)) {
362 sge->intr_cnt.tx_soft_cksums++;
366 sge->do_udp_csum--;
368 sge->do_tcp_csum = 3;
369 } else if (sge->do_tcp_csum != 0) {
371 sge->intr_cnt.tx_soft_cksums++;
376 sge->do_tcp_csum--;
382 sge->intr_cnt.tx_reclaims[qid]++;
383 free_cmdQ_buffers(sge, Q, reclaim_cnt);
393 sge->intr_cnt.cmdQ_full[qid]++;
408 sge->intr_cnt.tx_descs[MBLK_MAX - 1]++;
410 sge->intr_cnt.tx_descs[count]++;
486 doorbell_pio(sge, F_CMDQ1_ENABLE);
490 /* NOT YET doorbell_pio(sge, F_CMDQ0_ENABLE); */
494 doorbell_pio(sge, F_CMDQ0_ENABLE);
505 t1_sge_intr_disable(pesge* sge)
507 u32 val = t1_read_reg_4(sge->obj, A_PL_ENABLE);
509 t1_write_reg_4(sge->obj, A_PL_ENABLE, val & ~SGE_PL_INTR_MASK);
510 t1_write_reg_4(sge->obj, A_SG_INT_ENABLE, 0);
521 t1_sge_intr_enable(pesge* sge)
524 u32 val = t1_read_reg_4(sge->obj, A_PL_ENABLE);
526 t1_write_reg_4(sge->obj, A_PL_ENABLE, val | SGE_PL_INTR_MASK);
528 if (sge->obj->ch_flags & TSO_CAPABLE)
530 t1_write_reg_4(sge->obj, A_SG_INT_ENABLE, en);
538 t1_sge_intr_clear(pesge* sge)
540 t1_write_reg_4(sge->obj, A_PL_CAUSE, SGE_PL_INTR_MASK);
541 t1_write_reg_4(sge->obj, A_SG_INT_CAUSE, 0xffffffff);
548 t1_sge_intr_error_handler(pesge *sge)
550 peobj *obj = sge->obj;
554 sge->intr_cnt.respQ_empty++;
556 sge->intr_cnt.respQ_overflow++;
561 sge->intr_cnt.freelistQ_empty++;
562 freelQs_empty(sge);
565 sge->intr_cnt.pkt_too_big++;
570 sge->intr_cnt.pkt_mismatch++;
583 * PARAM: sge - SGE instance pointer.
586 sge_data_in(pesge *sge)
588 peobj *adapter = sge->obj;
589 struct respQ *Q = &sge->respQ;
629 (void) t1_sge_rx(sge, &sge->freelQ[e->FreelistQid],
632 sge->intr_cnt.rx_badEopSop++;
640 sge->intr_cnt.rx_cmdq0++;
642 sge->intr_cnt.rx_cmdq1++;
644 sge->intr_cnt.rx_flq0++;
646 sge->intr_cnt.rx_flq1++;
648 spin_lock(&sge->cmdQ[0].cq_qlock);
649 sge->cmdQ[0].cq_complete += e->Cmdq0CreditReturn;
650 spin_unlock(&sge->cmdQ[0].cq_qlock);
651 spin_lock(&sge->cmdQ[1].cq_qlock);
652 sge->cmdQ[1].cq_complete += e->Cmdq1CreditReturn;
654 (sge->cmdQ[0].cq_complete +
655 sge->cmdQ[1].cq_complete) > 16) {
659 spin_unlock(&sge->cmdQ[1].cq_qlock);
665 free_cmdQ_buffers(sge, &sge->cmdQ[0], credits_pend[0]);
669 free_cmdQ_buffers(sge, &sge->cmdQ[1], credits_pend[1]);
675 t1_sge_check_pause(sge, &sge->freelQ[e->FreelistQid]);
693 free_cmdQ_buffers(sge, &sge->cmdQ[0], credits_pend[0]);
695 free_cmdQ_buffers(sge, &sge->cmdQ[1], credits_pend[1]);
698 struct cmdQ *cmdQ = &sge->cmdQ[0];
701 doorbell_pio(sge, F_CMDQ0_ENABLE);
708 freelQs_empty(sge);
714 (sge->cmdQ[0].cq_credits > (sge->cmdQ[0].cq_entries_n>>2)) &&
715 (sge->cmdQ[1].cq_credits > (sge->cmdQ[1].cq_entries_n>>2))) {
726 (sge->cmdQ[0].cq_credits > (sge->cmdQ[0].cq_entries_n>>1)) &&
727 (sge->cmdQ[1].cq_credits > (sge->cmdQ[1].cq_entries_n>>1))) {
759 uint32_t rxoff = sa->sge->rx_offset;
803 t1_sge_rx(pesge *sge, struct freelQ *Q, unsigned int len, unsigned int offload)
806 peobj *adapter = sge->obj;
814 uint32_t rxoff = sge->rx_offset;
820 sge->intr_cnt.rx_flq1_cnt++;
822 sge->intr_cnt.rx_flq0_cnt++;
849 sge->intr_cnt.rx_pkt_drops++;
879 src += sge->rx_pkt_pad;
888 sge->intr_cnt.rx_pkt_copied++;
899 if (!offload && sge->rx_pkt_pad)
1011 alloc_freelQ_buffers(sge, Q);
1017 t1_sge_check_pause(pesge *sge, struct freelQ *Q)
1019 peobj *adapter = sge->obj;
1031 sge->intr_cnt.rx_pause_on++;
1040 alloc_freelQ_buffers(sge, Q);
1044 sge->intr_cnt.rx_pause_off++;
1051 sge->intr_cnt.rx_pause_ms += time;
1052 if (time > sge->intr_cnt.rx_pause_spike)
1053 sge->intr_cnt.rx_pause_spike = (uint32_t)time;
1055 sge->intr_cnt.rx_fl_credits = Q->fq_credits;
1060 alloc_freelQ_buffers(pesge *sge, struct freelQ *Q)
1067 uint32_t rxoff = sge->rx_offset;
1081 mapping = os_freelist_buffer_alloc(sge->obj, sz,
1084 sge->intr_cnt.rx_flbuf_fails++;
1087 sge->intr_cnt.rx_flbuf_allocs++;
1136 freelQs_empty(pesge *sge)
1138 u32 irq_reg = t1_read_reg_4(sge->obj, A_SG_INT_ENABLE);
1141 alloc_freelQ_buffers(sge, &sge->freelQ[0]);
1142 alloc_freelQ_buffers(sge, &sge->freelQ[1]);
1144 if ((sge->freelQ[0].fq_credits > sge->freelQ[0].fq_entries_n >> 2) &&
1145 (sge->freelQ[1].fq_credits > sge->freelQ[1].fq_entries_n >> 2)) {
1147 irqholdoff_reg = sge->intrtimer[sge->currIndex];
1151 irqholdoff_reg = sge->intrtimer_nres;
1153 t1_write_reg_4(sge->obj, A_SG_INTRTIMER, irqholdoff_reg);
1154 t1_write_reg_4(sge->obj, A_SG_INT_ENABLE, irq_reg);
1157 doorbell_pio(sge, F_FL0_ENABLE | F_FL1_ENABLE);
1165 free_cmdQ_buffers(pesge *sge, struct cmdQ *Q, unsigned int credits_pend)
1174 ch_t *chp = sge->obj;
1184 ch_unbind_dma_handle(sge->obj, ce->ce_dh);
1197 ch_unbind_dvma_handle(sge->obj, ce->ce_dh);
1216 ch_unbind_dma_handle(sge->obj, ce->ce_dh);
1220 ch_unbind_dvma_handle(sge->obj, ce->ce_dh);
1245 sge_get_stat(pesge *sge)
1247 return (&sge->intr_cnt);
1258 t1_sge_configure(pesge *sge, struct sge_params *p)
1260 sge->rx_pkt_pad = t1_is_T1B(sge->obj) ? 0 : SGE_RX_OFFSET;
1261 sge->jumbo_fl = t1_is_T1B(sge->obj) ? 1 : 0;
1263 sge->rx_offset = t1_is_T1B(sge->obj) ? SGE_RX_OFFSET: 0;
1265 if (alloc_rx_resources(sge, p))
1267 if (alloc_tx_resources(sge, p)) {
1268 free_rx_resources(sge);
1271 configure_sge(sge, p);
1279 p->large_buf_capacity = jumbo_payload_capacity(sge);
1288 alloc_rx_resources(pesge *sge, struct sge_params *p)
1293 struct freelQ *Q = &sge->freelQ[i];
1304 Q->fq_entries = pe_os_malloc_contig_wait_zero(sge->obj,
1325 sge->freelQ[1 ^ sge->jumbo_fl].fq_rx_buffer_size = SGE_RX_SM_BUF_SIZE +
1327 SGE_RX_OFFSET - sge->rx_pkt_pad;
1329 sge->freelQ[1 ^ sge->jumbo_fl].fq_rx_buffer_size =
1330 sge->obj->ch_sm_buf_sz;
1331 if (is_T2(sge->obj))
1332 sge->intr_cnt.rx_flq1_sz = sge->obj->ch_sm_buf_sz;
1334 sge->intr_cnt.rx_flq0_sz = sge->obj->ch_sm_buf_sz;
1337 sge->freelQ[sge->jumbo_fl].fq_rx_buffer_size = (16 * 1024) -
1340 sge->freelQ[sge->jumbo_fl].fq_rx_buffer_size = sge->obj->ch_bg_buf_sz;
1341 if (is_T2(sge->obj))
1342 sge->intr_cnt.rx_flq0_sz = sge->obj->ch_bg_buf_sz;
1344 sge->intr_cnt.rx_flq1_sz = sge->obj->ch_bg_buf_sz;
1347 sge->respQ.rq_genbit = 1;
1348 sge->respQ.rq_entries_n = sge_respq_cnt;
1349 sge->respQ.rq_credits = sge_respq_cnt;
1350 sge->respQ.rq_credits_thresh = sge_respq_cnt - (sge_respq_cnt >> 2);
1351 size = sizeof (respQ_e) * sge->respQ.rq_entries_n;
1353 sge->respQ.rq_entries = pe_os_malloc_contig_wait_zero(sge->obj,
1354 size, &(sge->respQ.rq_pa), &(sge->respQ.rq_dh),
1355 &(sge->respQ.rq_ah), 0);
1357 if (!sge->respQ.rq_entries)
1359 memset(sge->respQ.rq_entries, 0, size);
1363 free_rx_resources(sge);
1371 alloc_tx_resources(pesge *sge, struct sge_params *p)
1376 struct cmdQ *Q = &sge->cmdQ[i];
1384 sge->obj->ch_icookp);
1387 Q->cq_entries = pe_os_malloc_contig_wait_zero(sge->obj,
1400 pe_dma_handle_init(sge->obj, Q->cq_entries_n);
1406 free_tx_resources(sge);
1418 t1_sge_set_coalesce_params(pesge *sge, struct sge_params *p)
1422 (board_info(sge->obj)->clock_core / 1000000);
1424 t1_write_reg_4(sge->obj, A_SG_INTRTIMER, newTimer);
1431 * but sge->sge_control is setup and ready to go.
1434 configure_sge(pesge *sge, struct sge_params *p)
1436 ch_t *ap = sge->obj;
1441 setup_ring_params(ap, sge->cmdQ[0].cq_pa, sge->cmdQ[0].cq_entries_n,
1443 setup_ring_params(ap, sge->cmdQ[1].cq_pa, sge->cmdQ[1].cq_entries_n,
1445 setup_ring_params(ap, sge->freelQ[0].fq_pa,
1446 sge->freelQ[0].fq_entries_n, A_SG_FL0BASELWR,
1448 setup_ring_params(ap, sge->freelQ[1].fq_pa,
1449 sge->freelQ[1].fq_entries_n, A_SG_FL1BASELWR,
1454 SZ_CPL_RX_PKT - sge->rx_pkt_pad - sge->rx_offset + 1);
1455 setup_ring_params(ap, sge->respQ.rq_pa, sge->respQ.rq_entries_n,
1457 t1_write_reg_4(ap, A_SG_RSPQUEUECREDIT, (u32)sge->respQ.rq_entries_n);
1458 sge->sge_control = F_CMDQ0_ENABLE | F_CMDQ1_ENABLE | F_FL0_ENABLE |
1469 V_RX_PKT_OFFSET(sge->rx_pkt_pad);
1472 sge->sge_control |= F_ENABLE_BIG_ENDIAN;
1482 sge->intrtimer[0] = board_info(sge->obj)->clock_core / 1000000;
1484 sge->intrtimer[i] = SGE_INTRTIMER0 + (2 * i);
1485 sge->intrtimer[i] *= sge->intrtimer[0];
1487 sge->intrtimer[SGE_INTR_MAXBUCKETS - 1] =
1488 sge->intrtimer[0] * SGE_INTRTIMER1;
1490 sge->intrtimer_nres = (uint32_t)(sge->intrtimer[0] *
1493 sge->intrtimer[0] = (uint32_t)(sge->intrtimer[0] * SGE_INTRTIMER0);
1495 sge->currIndex = SGE_INTR_MAXBUCKETS - 1;
1499 sge->intrtimer[sge->currIndex]);
1501 (void) t1_sge_set_coalesce_params(sge, p);
1517 free_rx_resources(pesge *sge)
1521 if (sge->respQ.rq_entries) {
1522 size = sizeof (respQ_e) * sge->respQ.rq_entries_n;
1524 pe_os_free_contig(sge->obj, size, sge->respQ.rq_entries,
1525 sge->respQ.rq_pa, sge->respQ.rq_dh, sge->respQ.rq_ah);
1529 struct freelQ *Q = &sge->freelQ[i];
1532 free_freelQ_buffers(sge, Q);
1541 pe_os_free_contig(sge->obj, size, Q->fq_entries,
1553 free_freelQ_buffers(pesge *sge, struct freelQ *Q)
1569 if (i != sge->jumbo_fl) {
1571 &buffers_in_use[sge->obj->ch_sm_index]);
1574 &buffers_in_use[sge->obj->ch_big_index]);
1602 free_tx_resources(pesge *sge)
1608 struct cmdQ *Q = &sge->cmdQ[i];
1617 free_cmdQ_buffers(sge, Q, pending);
1625 pe_os_free_contig(sge->obj, size, Q->cq_entries,
1634 static inline unsigned int jumbo_payload_capacity(pesge *sge)
1636 return (sge->freelQ[sge->jumbo_fl].fq_rx_buffer_size -
1637 sizeof (struct cpl_rx_data) - sge->rx_pkt_pad - sge->rx_offset);
1644 pesge *sge = adapter->sge;
1647 sge->ptimeout = max(val, 1);
1654 pesge *sge = adapter->sge;
1656 return (is_T2(adapter) ? sge->ptimeout : 0);
1660 sge_add_fake_arp(pesge *sge, void *bp)
1662 sge->pskb = bp;
1667 sge_kstat_setup(pesge *sge)
1679 instance = ddi_get_instance(sge->obj->ch_dip);
1779 ksp->ks_private = (void *)sge;
1780 sge->ksp = ksp;
1789 sge_kstat_remove(pesge *sge)
1791 if (sge->ksp)
1792 kstat_delete(sge->ksp);
1798 pesge *sge;
1803 sge = (pesge *)ksp->ks_private;
1804 statsp = (p_ch_stats_t)&sge->intr_cnt;