Lines Matching defs:phy
242 u32 phy[2];
416 u32 phy;
425 phy = priv->phy[priv->phyNum];
438 TLan_MiiReadReg(nic, phy, MII_GEN_ID_HI, &tlphy_id1);
439 TLan_MiiReadReg(nic, phy, MII_GEN_ID_LO, &tlphy_id2);
446 TLan_MiiReadReg(nic, phy, MII_GEN_STS, &status);
448 TLan_MiiReadReg(nic, phy, MII_GEN_STS, &status);
452 TLan_MiiReadReg(nic, phy, MII_AN_LPA, &partner);
453 TLan_MiiReadReg(nic, phy, TLAN_TLPHY_PAR,
494 TLan_MiiReadReg(nic, phy, TLAN_TLPHY_CTL, &tlphy_ctl);
496 TLan_MiiWriteReg(nic, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1172 * phy The address of the PHY to be queried.
1185 int TLan_MiiReadReg(struct nic *nic __unused, u16 phy, u16 reg, u16 * val)
1205 TLan_MiiSendData(BASE, phy, 5); /* Device # */
1333 * phy The address of the PHY to be written to.
1345 void TLan_MiiWriteReg(struct nic *nic __unused, u16 phy, u16 reg, u16 val)
1361 TLan_MiiSendData(BASE, phy, 5); /* Device # */
1436 u32 phy;
1446 priv->phy[0] = TLAN_PHY_MAX_ADDR;
1448 priv->phy[0] = TLAN_PHY_NONE;
1451 priv->phy[1] = TLAN_PHY_NONE;
1452 for (phy = 0; phy <= TLAN_PHY_MAX_ADDR; phy++) {
1453 TLan_MiiReadReg(nic, phy, MII_GEN_CTL, &control);
1454 TLan_MiiReadReg(nic, phy, MII_GEN_ID_HI, &hi);
1455 TLan_MiiReadReg(nic, phy, MII_GEN_ID_LO, &lo);
1458 printf("PHY found at %hX %hX %hX %hX\n", phy,
1460 if ((priv->phy[1] == TLAN_PHY_NONE)
1461 && (phy != TLAN_PHY_MAX_ADDR)) {
1462 priv->phy[1] = phy;
1467 if (priv->phy[1] != TLAN_PHY_NONE) {
1469 } else if (priv->phy[0] != TLAN_PHY_NONE) {
1485 TLan_MiiWriteReg(nic, priv->phy[priv->phyNum], MII_GEN_CTL, value);
1486 if ((priv->phyNum == 0) && (priv->phy[1] != TLAN_PHY_NONE)
1491 TLan_MiiWriteReg(nic, priv->phy[1], MII_GEN_CTL, value);
1512 TLan_MiiWriteReg(nic, priv->phy[priv->phyNum], MII_GEN_CTL, value);
1526 u16 phy;
1529 phy = priv->phy[priv->phyNum];
1534 TLan_MiiWriteReg(nic, phy, MII_GEN_CTL, value);
1535 TLan_MiiReadReg(nic, phy, MII_GEN_CTL, &value);
1537 TLan_MiiReadReg(nic, phy, MII_GEN_CTL, &value);
1557 u16 phy;
1561 phy = priv->phy[priv->phyNum];
1563 TLan_MiiReadReg(nic, phy, MII_GEN_STS, &status);
1564 TLan_MiiReadReg(nic, phy, MII_GEN_STS, &ability);
1570 TLan_MiiWriteReg(nic, phy, MII_GEN_CTL, 0x0000);
1574 TLan_MiiWriteReg(nic, phy, MII_GEN_CTL, 0x0100);
1577 TLan_MiiWriteReg(nic, phy, MII_GEN_CTL, 0x2000);
1581 TLan_MiiWriteReg(nic, phy, MII_GEN_CTL, 0x2100);
1585 TLan_MiiWriteReg(nic, phy, MII_AN_ADV,
1588 TLan_MiiWriteReg(nic, phy, MII_GEN_CTL, 0x1000);
1590 TLan_MiiWriteReg(nic, phy, MII_GEN_CTL, 0x1200);
1618 TLan_MiiReadReg(nic, phy, TLAN_TLPHY_CTL, &tctl);
1631 TLan_MiiWriteReg(nic, phy, MII_GEN_CTL, control);
1632 TLan_MiiWriteReg(nic, phy, TLAN_TLPHY_CTL, tctl);
1651 u16 phy;
1654 phy = priv->phy[priv->phyNum];
1656 TLan_MiiReadReg(nic, phy, MII_GEN_STS, &status);
1658 TLan_MiiReadReg(nic, phy, MII_GEN_STS, &status);
1681 TLan_MiiReadReg(nic, phy, MII_AN_ADV, &an_adv);
1682 TLan_MiiReadReg(nic, phy, MII_AN_LPA, &an_lpa);
1709 TLan_MiiWriteReg(nic, phy, MII_GEN_CTL,
1714 TLan_MiiWriteReg(nic, phy, MII_GEN_CTL,
1752 u16 phy;
1755 phy = priv->phy[priv->phyNum];
1758 TLan_MiiReadReg(nic, phy, MII_GEN_STS, &phy_status);