Lines Matching defs:vbit
2819 * vbit indicates direction (0 for "opcode r,r_m") or (1 for "opcode r_m, r")
2821 #define STANDARD_MODRM(x, mode, reg, r_m, rex_prefix, wbit, vbit) { \
2824 dtrace_get_operand(x, mode, r_m, wbit, vbit); \
2825 dtrace_get_operand(x, REG_ONLY, reg, wbit, 1 - vbit); \
2834 #define MIXED_MM(x, mode, reg, r_m, rex_prefix, wbit, w2, vbit) { \
2837 dtrace_get_operand(x, mode, r_m, wbit, vbit); \
2838 dtrace_get_operand(x, REG_ONLY, reg, w2, 1 - vbit); \
2843 * vbit indicates direction
2847 #define THREEOPERAND(x, mode, reg, r_m, rex_prefix, wbit, w2, immsize, vbit) { \
2850 dtrace_get_operand(x, mode, r_m, wbit, 2-vbit); \
2851 dtrace_get_operand(x, REG_ONLY, reg, w2, 1+vbit); \
2903 uint_t vbit;
3691 vbit = 0; /* initialize for mem/reg -> reg */
3889 vbit = 1;
3895 dtrace_get_operand(x, REG_ONLY, EAX_REGNO, wbit, 1 - vbit);
3896 dtrace_imm_opnd(x, wbit, OPSIZE64(addr_size, LONG_OPND), vbit);
3898 x->d86_opnd[vbit].d86_mode = MODE_OFFSET;
3905 vbit = 1;
3912 dtrace_get_operand(x, mode, r_m, LONG_OPND, vbit);
3913 dtrace_get_operand(x, REG_ONLY, reg, SEG_OPND, 1 - vbit);
3921 vbit = VBIT(opcode2);
3926 if (vbit) {
4124 /* move special register to register or reverse if vbit */
4129 vbit = 1;
4136 vbit = 1;
4143 vbit = 1;
4152 dtrace_get_operand(x, REG_ONLY, reg, wbit, vbit);
4153 dtrace_get_operand(x, REG_ONLY, r_m, LONG_OPND, 1 - vbit);
4761 vbit = opcode2 >> 2 & 0x1; /* vbit = 1: st -> st(i) */
4763 case FFC: /* case for vbit always = 0 */
4766 (void) strlcat(x->d86_opnd[1 - vbit].d86_opnd, "%st", OPLEN);
4767 (void) strlcat(x->d86_opnd[vbit].d86_opnd, "%st(X)", OPLEN);
4768 x->d86_opnd[vbit].d86_opnd[4] = r_m + '0';
5050 vbit = 2;
5053 vbit = 1;
5058 dtrace_get_operand(x, REG_ONLY, reg, LONG_OPND, vbit);
5059 dtrace_get_operand(x, mode, r_m, wbit, vbit - 1);
5061 if (vbit == 2)
5174 vbit = 1;
5175 dtrace_get_operand(x, mode, r_m, wbit, vbit);
5176 dtrace_get_operand(x, REG_ONLY, reg, wbit, vbit - 1);