Lines Matching defs:byte
40 * Disassembly begins in dis_distable, which is equivalent to the One-byte
107 Mb, /* register or memory, always byte sized */
133 NORM, /* instructions w/o ModR/M byte, no memory access */
134 IMPLMEM, /* instructions w/o ModR/M byte, implicit mem access */
142 Ib, /* for push immediate byte */
247 #define VEX_2bytes 0xC5 /* the first byte of two-byte form */
248 #define VEX_3bytes 0xC4 /* the first byte of three-byte form */
250 #define FILL 0x90 /* Fill byte used for alignment (nop) */
411 * decode for scale from SIB byte
416 * decode for scale from VSIB byte, note that we always include the scale factor
1745 * Decode table for 0x0F0D which uses the first byte of the mod_rm to
2287 #define VEX_m_0F 0x01 /* implied 0F leading opcode byte */
2288 #define VEX_m_0F38 0x02 /* implied 0F 38 leading opcode byte */
2289 #define VEX_m_0F3A 0x03 /* implied 0F 3A leading opcode byte */
2297 * Even in 64 bit mode, usually only 4 byte immediate operands are supported.
2313 #define BYTE_OPND 0 /* w-bit value indicating byte register */
2399 * Get the next byte and separate the op code into the high and low nibbles.
2404 int byte;
2415 byte = x->d86_get_byte(x->d86_data);
2416 if (byte < 0)
2418 x->d86_bytes[x->d86_len++] = byte;
2419 *low = byte & 0xf; /* ----xxxx low 4 bits */
2420 *high = byte >> 4 & 0xf; /* xxxx---- bits 7 to 4 */
2425 * Get and decode an SIB (scaled index base) byte
2430 int byte;
2435 byte = x->d86_get_byte(x->d86_data);
2436 if (byte < 0) {
2440 x->d86_bytes[x->d86_len++] = byte;
2442 *base = byte & 0x7;
2443 *index = (byte >> 3) & 0x7;
2444 *ss = (byte >> 6) & 0x3;
2448 * Get the byte following the op code and separate it into the
2506 int byte;
2544 byte = x->d86_get_byte(x->d86_data);
2545 if (byte < 0) {
2549 x->d86_bytes[x->d86_len++] = byte;
2550 x->d86_opnd[opindex].d86_value |= (uint64_t)byte << (i * 8);
2599 * mode = addressing mode from ModRM byte
2600 * r_m = r_m (or reg if mode == 3) field from ModRM byte
2610 int have_SIB = 0; /* flag presence of scale-index-byte */
2705 * can involve an SIB (scaled index and base) byte to decode.
2818 * wbit indicates a byte(0) or opnd_size(1) operation
2904 uint_t mode = 0; /* mode value from ModRM byte */
2905 uint_t reg; /* reg value from ModRM byte */
2906 uint_t r_m; /* r_m value from ModRM byte */
2908 uint_t opcode1; /* high nibble of 1st byte */
2909 uint_t opcode2; /* low nibble of 1st byte */
2910 uint_t opcode3; /* extra opcode bits usually from ModRM byte */
2911 uint_t opcode4; /* high nibble of 2nd byte */
2912 uint_t opcode5; /* low nibble of 2nd byte */
2913 uint_t opcode6; /* high nibble of 3rd byte */
2914 uint_t opcode7; /* low nibble of 3rd byte */
2935 * VEX prefix byte 1, includes vex.r, vex.x and vex.b
2941 * For 32-bit mode, it should prefetch the next byte to
2997 * Get one opcode byte and check for zero padding that follows
3006 (void) strncpy(x->d86_mnem, ".byte\t0", OPLEN);
3259 * byte so we may need to perform a table indirection.
3318 * byte of either 0xF0 or 0xF1, so we use another
3411 * If still not at a TERM decode entry, then a ModRM byte
3581 * an extra byte, and thus an extra table. As of this
3714 * wbit lives in 2nd byte, note that operands
3767 * opcode 0x6B for byte, sign-extended displacement, 0x69 for word(s)
3988 /* single memory or register byte operand */
4185 * bits 3-4 of op code byte
4632 * byte (format Ib). The int 3 instruction (opcode 0xCC),
4653 /* an unused byte must be discarded */
4732 * Only the following exact byte sequences are allowed:
4945 /* one byte immediate number */
5023 /* one byte immediate number */
5041 /* one byte immediate number */
5089 /* one byte immediate number */
5139 /* one byte immediate number */
5151 /* one byte immediate number */
5165 /* one byte immediate number */