Lines Matching refs:more
35 msgstr "The number of errors associated with this CPU has exceeded \n acceptable levels. Refer to %s for more information."
51 msgstr "The number of errors associated with this CPU has exceeded \n acceptable levels. Refer to %s for more information."
67 msgstr "The number of errors associated with this CPU has exceeded \n acceptable levels. Refer to %s for more information."
83 msgstr "The number of errors associated with this CPU has exceeded \n acceptable levels. Refer to %s for more information."
99 msgstr "The number of errors associated with this CPU has exceeded \n acceptable levels. Refer to %s for more information."
115 msgstr "The number of errors associated with this CPU has exceeded \n acceptable levels. Refer to %s for more information."
131 msgstr "The number of errors associated with this CPU has exceeded \n acceptable levels. Refer to %s for more information."
147 msgstr "The number of errors associated with this CPU has exceeded \n acceptable levels. Refer to %s for more information."
163 msgstr "The number of errors associated with this CPU has exceeded \n acceptable levels. Refer to %s for more information."
179 msgstr "The number of errors associated with this CPU has exceeded \n acceptable levels. Refer to %s for more information."
195 msgstr "The number of errors associated with this memory module continues to exceed acceptable levels. Refer to %s for more information."
211 msgstr "The number of correctable errors associated with this memory module has exceeded acceptable levels. Refer to %s for more information."
227 msgstr "The number of errors associated with this memory module has exceeded acceptable levels. Refer to %s for more information."
243 msgstr "A problem was detected in the interconnect between a memory DIMM module and\nits memory controller. \n Refer to %s for more information."
259 msgstr "The number of integer register errors associated with this thread has exceeded acceptable levels.\n Refer to %s for more information."
275 msgstr "The number of floating register errors associated with this thread has exceeded acceptable levels.\n Refer to %s for more information."
291 msgstr "The number of ancillary register errors associated with this thread has exceeded acceptable levels.\n Refer to %s for more information."
307 msgstr "The number of ITLB errors associated with this thread has exceeded acceptable levels.\n Refer to %s for more information."
323 msgstr "The number of DTLB errors associated with this thread has exceeded acceptable levels.\n Refer to %s for more information."
339 msgstr "The number of I-cache errors associated with this thread has exceeded acceptable levels.\n Refer to %s for more information."
355 msgstr "The number of D-cache errors associated with this thread has exceeded acceptable levels.\n Refer to %s for more information."
371 msgstr "The number of modular arithmetic unit errors associated with this unit has exceeded acceptable levels.\n Refer to %s for more information."
387 msgstr "The number of level 2 cache correctable data errors has exceeded acceptable levels.\n Refer to %s for more information."
403 msgstr "The number of level 2 cache tag errors has exceeded acceptable levels.\n Refer to %s for more information."
419 msgstr "The number of level 2 cache control errors has exceeded acceptable levels.\n Refer to %s for more information."
435 msgstr "A problem was detected in the interconnect between a memory DIMM module and\nits memory controller. \n Refer to %s for more information."
451 msgstr "The number of level 2 cache uncorrectable data errors has exceeded acceptable levels.\n Refer to %s for more information."
467 msgstr "The number of level 2 cache correctable data errors has exceeded acceptable levels.\n Refer to %s for more information."
483 msgstr "The number of level 2 cache uncorrectable data errors has exceeded acceptable levels.\n Refer to %s for more information."
499 msgstr "Errors have been detected on multiple memory modules, suggesting that a problem exists somewhere else in the system.\n Refer to %s for more information."
515 msgstr "A problem was detected in the NCU subsystem of the N2's SOC\n Refer to %s for more information."
517 msgstr "One or more device instances may be disabled\n"
531 msgstr "A problem was detected in the DMU subsystem of the N2's SOC\n Refer to %s for more information."
533 msgstr "One or more device instances may be disabled\n"
547 msgstr "A problem was detected in the NIU subsystem of the N2's SOC\n Refer to %s for more information."
549 msgstr "One or more device instances may be disabled\n"
563 msgstr "A problem was detected in the SIU subsystem of the N2's SOC\n Refer to %s for more information."
565 msgstr "One or more device instances may be disabled\n"
579 msgstr "A problem was detected in N2's SOC\n Refer to %s for more information."
581 msgstr "One or more device instances may be disabled\n"
595 msgstr "A problem was detected in the crossbar of the N2's SOC\n Refer to %s for more information."
597 msgstr "One or more device instances may be disabled\n"
611 msgstr "An uncorrectable problem was detected in the IO hostbridge in which a mismatch\nin the SW and FW prevents the error to be properly handled.\n Refer to %s for more information."
613 msgstr "One or more device instances may be disabled\n"
627 msgstr "An uncorrectable problem was detected in the NCX subsystem.\n Refer to %s for more information."
629 msgstr "One or more device instances may be disabled\n"
643 msgstr "A problem was detected in the interconnect between a memory DIMM module and\nits memory controller. A lane failover has taken place.\n Refer to %s for more information."
659 msgstr "The number of integer register errors associated with this thread has exceeded acceptable levels.\n Refer to %s for more information."
675 msgstr "The number of floating register errors associated with this thread has exceeded acceptable levels.\n Refer to %s for more information."
691 msgstr "The number of ancillary register errors associated with this thread has exceeded acceptable levels.\n Refer to %s for more information."
707 msgstr "The number of ITLB errors associated with this thread has exceeded acceptable levels.\n Refer to %s for more information."
723 msgstr "The number of DTLB errors associated with this thread has exceeded acceptable levels.\n Refer to %s for more information."
739 msgstr "The number of I-cache errors associated with this thread has exceeded acceptable levels.\n Refer to %s for more information."
755 msgstr "The number of D-cache errors associated with this thread has exceeded acceptable levels.\n Refer to %s for more information."
771 msgstr "The number of modular arithmetic unit errors associated with this thread has exceeded acceptable levels.\n Refer to %s for more information."
787 msgstr "The number of level 2 cache correctable data errors has exceeded acceptable levels.\n Refer to %s for more information."
803 msgstr "The number of level 2 cache tag errors has exceeded acceptable levels.\n Refer to %s for more information."
819 msgstr "The number of level 2 cache control errors has exceeded acceptable levels.\n Refer to %s for more information."
835 msgstr "The number of level 2 cache uncorrectable data errors has exceeded acceptable levels.\n Refer to %s for more information."
851 msgstr "A CPU chip's Link Framing Unit has stopped using a bad lane.\n Refer to %s for more information."
867 msgstr "A CPU chip's Link Framing Unit has encountered a protocol error.\n Refer to %s for more information."
883 msgstr "A CPU chip's Link Framing Unit has encountered an unrecoverable lane failure.\n Refer to %s for more information."
899 msgstr "The ultraSPARC-T2plus Coherency Interconnect has detected a fatal\ninternal problem.\n Refer to %s for more information."
915 msgstr "The ultraSPARC-T2plus Coherency Interconnect has detected an internal problem.\n Refer to %s for more information."
931 msgstr "An ultraSPARC-T2plus Interconnect has detected a fatal communication\nproblem with a CPU.\n Refer to %s for more information."
947 msgstr "The number of CRC errors between an ultraSPARC-T2plus\nCoherency Interconnect and a CPU has exceeded acceptable levels.\n Refer to %s for more information."
963 msgstr "An ultraSPARC-T2plus Coherency Interconnect has detected a single-lane\nfailure communicating with a CPU.\n Refer to %s for more information."
979 msgstr "An ultraSPARC-T2plus Coherency Interconnect has detected a fatal\nfault commnicating with a CPU.\n Refer to %s for more information."
995 msgstr "An ultraSPARC-T2plus Coherency Interconnect has detected a fatal internal\nfault and has automatically reset.\n Refer to %s for more information."
1011 msgstr "An ultraSPARC-T2plus Coherency Interconnect has detected a fatal communication\nfault with a CPU.\n Refer to %s for more information."
1027 msgstr "An ultraSPARC-T2plus Coherency Interconnect has detected a fault\ncommunicating with a CPU.\n Refer to %s for more information."
1043 msgstr "The ultraSPARC-T2plus Interconnect has detected a fault communicating\nwith the service processor.\n Refer to %s for more information."
1059 msgstr "ultraSPARC-T2plus Coherency Interconnect detected a fault on the LPC bus.\n Refer to %s for more information."
1075 msgstr "An ultraSPARC-T2plus Coherency Interconnect has detected a fatal fault.\n Refer to %s for more information."
1091 msgstr "The number of correctable errors associated with this memory module has exceeded acceptable levels.\n Refer to %s for more information."
1107 msgstr "A pattern of correctable errors has been observed suggesting the potential exists that an uncorrectable error may occur.\n Refer to %s for more information."
1123 msgstr "A pattern of correctable errors has been observed suggesting the potential exists that an uncorrectable error may occur.\n Refer to %s for more information."
1139 msgstr "The number of correctable errors associated with this strand has exceeded acceptable levels.\n Refer to %s for more information."
1155 msgstr "The number of correctable errors in internal memory associated with this strand have exceeded acceptable levels.\n Refer to %s for more information."
1171 msgstr "This strand has encountered an uncorrectable error.\n Refer to %s for more information."
1187 msgstr "Internal memory associated with this strand has encountered an uncorrectable error.\n Refer to %s for more information."
1203 msgstr "The number of correctable errors associated with this core has exceeded acceptable levels.\n Refer to %s for more information."
1219 msgstr "The number of correctable errors in internal memory associated with this core have exceeded acceptable levels.\n Refer to %s for more information."
1235 msgstr "This core has encountered an uncorrectable error.\n Refer to %s for more information."
1251 msgstr "An uncorrectable error has occurred in internal memory associated with this core.\n Refer to %s for more information."
1267 msgstr "The number of chip-level correctable errors has exceeded acceptable levels.\n Refer to %s for more information."
1283 msgstr "The number of correctable errors in internal memory associated with this chip have exceeded acceptable levels.\n Refer to %s for more information."
1299 msgstr "This chip has encountered a chip-level uncorrectable error.\n Refer to %s for more information."
1315 msgstr "Internal memory associated with this chip has encountered an uncorrectable\nerror.\n Refer to %s for more information."
1331 msgstr "The number of chip-to-chip recoverable errors has exceeded acceptable levels.\n Refer to %s for more information."
1347 msgstr "A CRC error has occurred in the interconnect between two CPU chips.\nWhile no data has been lost, a lane failover has taken place.\n Refer to %s for more information."
1363 msgstr "A chip-to-chip unrecoverable CRC error has occurred.\n Refer to %s for more information."
1379 msgstr "Recoverable CRC errors have occurred in the interconnect between a\nmemory buffer and its memory controller. No data has been lost;\nhowever, the number of CRC errors associated with this memory buffer-controller\npair has exceeded acceptable levels.\n Refer to %s for more information."
1395 msgstr "A CRC error has occurred in the interconnect between a memory buffer and\nits memory controller. While no data has been lost, a lane failover\nhas taken place.\n Refer to %s for more information."
1411 msgstr "A problem was detected in the interconnect between a memory buffer\nand its memory controller.\n Refer to %s for more information."
1427 msgstr "An address-out-of-bounds error has occurred.\n Refer to %s for more information."
1443 msgstr "The error report generator has received input data that is inconsistent or\nimproperly formatted.\n Refer to %s for more information."
1447 msgstr "This error does not affect system operation. The error which\ncould not be reported may have more serious impact which cannot be determined.\n"
1459 msgstr "A system boot bus error has occurred.\n Refer to %s for more information."
1475 msgstr "The Service Processor failed.\n Refer to %s for more information."