Lines Matching refs:interrupt

99 	wr	%g5, CLEAR_SOFTINT	! clear interrupt on this pil
126 	! clear the iv_pending flag for this interrupt request
138 	!	%g1 - interrupt handler at TL==0
372 	! See if we are interrupting another interrupt thread.
379 	! We have interrupted an interrupt thread. Take a timestamp,
385 	! We came in on top of an interrupt thread that had no timestamp.
386 	! This could happen if, for instance, an interrupt thread which had
562 	! higher effective pil because a higher-level interrupt may have
592 	! The problem is that a high-level interrupt could arrive at any time.
614 	! interrupt. Above we have set t_intr_start to %tick, not 0. This
615 	! means a high-level interrupt can arrive and update the same stats
646 	! for each interrupt handler we invoke. If we hit INTRCNT_LIMIT, then
654 	! won't ever re-enter the scheduler, and the interrupt will be forever
766 	! If we pinned an interrupt thread, store its starting timestamp.
778 	! If a high-level interrupt occurred while we were attempting to store
807 	! All traps below DISP_LEVEL are disabled here, but the mondo interrupt
838 	! Put thread back on the interrupt thread list.
1078 	! Another high-level interrupt is active below this one, so
1079 	! there is no need to check for an interrupt thread. That will be
1080 	! done by the lowest priority high-level interrupt active.
1216 	! Clear bit for this level in CPU's interrupt active bitmask.
1302 	! We found another high-level interrupt active below the one that just
1306 	! interrupted high-level interrupt.
1343 	! If we haven't interrupted another high-level interrupt, we may have
1344 	! interrupted a low level interrupt thread. If so, store a starting
1477 	wrpr	%g0, %g1, %pstate		! disable interrupt
1541 	wrpr	%l1, %pstate		! disable interrupt
1543 	! We have a pointer to an interrupt vector data structure.
1633 	! We have a pointer to an interrupt vector data structure.
1927  * Set CPU's base SPL level, based on which interrupt levels are active.
1950 	! Determine highest interrupt level active.  Several could be blocked
2012 	! restore registers from the base of the stack of the interrupt thread.
2212 	! cpu_m.intrstat[pil][1], which is either when the interrupt was