Lines Matching refs:inst
60 fp_inst_type inst; in fldst() member
64 fp.inst = pinst; in fldst()
151 fp_inst_type inst, /* FPU instruction to simulate. */ in fmovcc_fcc() argument
181 cond = (enum icc_type) (inst.rs1 & 0xf); in fmovcc_fcc()
239 nrs2 = inst.rs2; in fmovcc_fcc()
240 nrd = inst.rd; in fmovcc_fcc()
241 if (inst.prec < 2) { /* fmovs */ in fmovcc_fcc()
252 if (inst.prec > 2) { /* fmovq */ in fmovcc_fcc()
267 fp_inst_type inst, /* FPU instruction to simulate. */ in fmovcc_icc() argument
294 cond = (enum icc_type) (inst.rs1 & 0xf); in fmovcc_icc()
352 nrs2 = inst.rs2; in fmovcc_icc()
353 nrd = inst.rd; in fmovcc_icc()
354 if (inst.prec < 2) { /* fmovs */ in fmovcc_icc()
365 if (inst.prec > 2) { /* fmovq */ in fmovcc_icc()
382 fp_inst_type inst, /* FPU instruction to simulate. */ in fmovcc() argument
387 opf_cc = (enum cc_type) ((inst.ibit << 2) | (inst.opcode >> 4)); in fmovcc()
389 return (fmovcc_icc(pfpsd, inst, opf_cc)); in fmovcc()
391 return (fmovcc_fcc(pfpsd, inst, pfsr, opf_cc)); in fmovcc()
403 fp_inst_type inst) /* FPU instruction to simulate. */ in fmovr() argument
415 nrs1 = inst.rs1; in fmovr()
418 if (inst.ibit) /* ibit must be unused */ in fmovr()
425 rcond = (enum rcond_type) (inst.opcode >> 3) & 7; in fmovr()
453 nrs2 = inst.rs2; in fmovr()
454 nrd = inst.rd; in fmovr()
455 if (inst.prec < 2) { /* fmovs */ in fmovr()
461 if (inst.prec > 2) { /* fmovq */ in fmovr()
579 fp_inst_type inst; in movcc() member
583 fp.inst = pinst; /* Extract simm11 field */ in movcc()