Lines Matching refs:sc
509 iwh_sc_t *sc; in iwh_attach() local
526 sc = ddi_get_soft_state(iwh_soft_state_p, in iwh_attach()
528 ASSERT(sc != NULL); in iwh_attach()
530 if (sc->sc_flags & IWH_F_RUNNING) { in iwh_attach()
531 (void) iwh_init(sc); in iwh_attach()
534 atomic_and_32(&sc->sc_flags, ~IWH_F_SUSPEND); in iwh_attach()
552 sc = ddi_get_soft_state(iwh_soft_state_p, instance); in iwh_attach()
553 ASSERT(sc != NULL); in iwh_attach()
555 sc->sc_dip = dip; in iwh_attach()
560 err = ddi_regs_map_setup(dip, 0, &sc->sc_cfg_base, 0, 0, in iwh_attach()
561 &iwh_reg_accattr, &sc->sc_cfg_handle); in iwh_attach()
568 sc->sc_dev_id = ddi_get16(sc->sc_cfg_handle, in iwh_attach()
569 (uint16_t *)(sc->sc_cfg_base + PCI_CONF_DEVID)); in iwh_attach()
570 if ((sc->sc_dev_id != 0x4232) && in iwh_attach()
571 (sc->sc_dev_id != 0x4235) && in iwh_attach()
572 (sc->sc_dev_id != 0x4236) && in iwh_attach()
573 (sc->sc_dev_id != 0x4237) && in iwh_attach()
574 (sc->sc_dev_id != 0x423a) && in iwh_attach()
575 (sc->sc_dev_id != 0x423b) && in iwh_attach()
576 (sc->sc_dev_id != 0x423c) && in iwh_attach()
577 (sc->sc_dev_id != 0x423d)) { in iwh_attach()
583 iwh_init_ht_conf(sc); in iwh_attach()
584 iwh_overwrite_11n_rateset(sc); in iwh_attach()
586 sc->sc_rev = ddi_get8(sc->sc_cfg_handle, in iwh_attach()
587 (uint8_t *)(sc->sc_cfg_base + PCI_CONF_REVID)); in iwh_attach()
592 ddi_put8(sc->sc_cfg_handle, (uint8_t *)(sc->sc_cfg_base + in iwh_attach()
598 sc->sc_clsz = ddi_get16(sc->sc_cfg_handle, in iwh_attach()
599 (uint16_t *)(sc->sc_cfg_base + PCI_CONF_CACHE_LINESZ)); in iwh_attach()
600 if (!sc->sc_clsz) { in iwh_attach()
601 sc->sc_clsz = 16; in iwh_attach()
603 sc->sc_clsz = (sc->sc_clsz << 2); in iwh_attach()
605 sc->sc_dmabuf_sz = roundup(0x2000 + sizeof (struct ieee80211_frame) + in iwh_attach()
608 IEEE80211_WEP_CRCLEN), sc->sc_clsz); in iwh_attach()
613 err = ddi_regs_map_setup(dip, 1, &sc->sc_base, in iwh_attach()
614 0, 0, &iwh_reg_accattr, &sc->sc_handle); in iwh_attach()
624 sc->sc_hw_rev = IWH_READ(sc, CSR_HW_REV); in iwh_attach()
640 sc->sc_intr_htable = kmem_zalloc(sizeof (ddi_intr_handle_t), KM_SLEEP); in iwh_attach()
642 err = ddi_intr_alloc(dip, sc->sc_intr_htable, DDI_INTR_TYPE_FIXED, 0, in iwh_attach()
650 err = ddi_intr_get_pri(sc->sc_intr_htable[0], &sc->sc_intr_pri); in iwh_attach()
657 mutex_init(&sc->sc_glock, NULL, MUTEX_DRIVER, in iwh_attach()
658 DDI_INTR_PRI(sc->sc_intr_pri)); in iwh_attach()
659 mutex_init(&sc->sc_tx_lock, NULL, MUTEX_DRIVER, in iwh_attach()
660 DDI_INTR_PRI(sc->sc_intr_pri)); in iwh_attach()
661 mutex_init(&sc->sc_mt_lock, NULL, MUTEX_DRIVER, in iwh_attach()
662 DDI_INTR_PRI(sc->sc_intr_pri)); in iwh_attach()
664 cv_init(&sc->sc_cmd_cv, NULL, CV_DRIVER, NULL); in iwh_attach()
665 cv_init(&sc->sc_put_seg_cv, NULL, CV_DRIVER, NULL); in iwh_attach()
666 cv_init(&sc->sc_ucode_cv, NULL, CV_DRIVER, NULL); in iwh_attach()
671 cv_init(&sc->sc_mt_cv, NULL, CV_DRIVER, NULL); in iwh_attach()
672 sc->sc_mf_thread = NULL; in iwh_attach()
673 sc->sc_mf_thread_switch = 0; in iwh_attach()
678 err = iwh_alloc_shared(sc); in iwh_attach()
685 (void) memset(sc->sc_shared, 0, sizeof (iwh_shared_t)); in iwh_attach()
690 err = iwh_alloc_kw(sc); in iwh_attach()
697 err = iwh_reset_hw(sc); in iwh_attach()
707 err = iwh_preinit(sc); in iwh_attach()
717 err = iwh_eep_load(sc); in iwh_attach()
724 if (IWH_READ_EEP_SHORT(sc, EEP_VERSION) < 0x011a) { in iwh_attach()
733 iwh_get_mac_from_eep(sc); in iwh_attach()
738 sc->sc_eep_calib = (struct iwh_eep_calibration *) in iwh_attach()
739 iwh_eep_addr_trans(sc, EEP_CALIBRATION); in iwh_attach()
744 err = iwh_ring_init(sc); in iwh_attach()
751 if ((0x423c == sc->sc_dev_id) || (0x423d == sc->sc_dev_id)) { in iwh_attach()
752 sc->sc_hdr = (iwh_firmware_hdr_t *)iwh_fw_5150_bin; in iwh_attach()
754 sc->sc_hdr = (iwh_firmware_hdr_t *)iwh_fw_5000_bin; in iwh_attach()
760 err = iwh_alloc_fw_dma(sc); in iwh_attach()
771 ic = &sc->sc_ic; in iwh_attach()
793 if (sc->sc_ht_conf.ht_support) { in iwh_attach()
816 if (sc->sc_ht_conf.cap & HT_CAP_SUP_WIDTH) { in iwh_attach()
843 iwh_overwrite_ic_default(sc); in iwh_attach()
855 err = ddi_intr_add_softint(dip, &sc->sc_soft_hdl, DDI_INTR_SOFTPRI_MAX, in iwh_attach()
856 iwh_rx_softintr, (caddr_t)sc); in iwh_attach()
863 err = ddi_intr_add_handler(sc->sc_intr_htable[0], iwh_intr, in iwh_attach()
864 (caddr_t)sc, NULL); in iwh_attach()
871 err = ddi_intr_enable(sc->sc_intr_htable[0]); in iwh_attach()
896 macp->m_driver = sc; in iwh_attach()
936 sc->sc_mf_thread_switch = 1; in iwh_attach()
937 if (NULL == sc->sc_mf_thread) { in iwh_attach()
938 sc->sc_mf_thread = thread_create((caddr_t)NULL, 0, in iwh_attach()
939 iwh_thread, sc, 0, &p0, TS_RUN, minclsyspri); in iwh_attach()
942 atomic_or_32(&sc->sc_flags, IWH_F_ATTACHED); in iwh_attach()
947 (void) ddi_intr_disable(sc->sc_intr_htable[0]); in iwh_attach()
950 (void) ddi_intr_remove_handler(sc->sc_intr_htable[0]); in iwh_attach()
953 (void) ddi_intr_remove_softint(sc->sc_soft_hdl); in iwh_attach()
954 sc->sc_soft_hdl = NULL; in iwh_attach()
960 iwh_free_fw_dma(sc); in iwh_attach()
963 iwh_ring_free(sc); in iwh_attach()
966 iwh_free_kw(sc); in iwh_attach()
969 iwh_free_shared(sc); in iwh_attach()
972 iwh_destroy_locks(sc); in iwh_attach()
975 (void) ddi_intr_free(sc->sc_intr_htable[0]); in iwh_attach()
978 kmem_free(sc->sc_intr_htable, sizeof (ddi_intr_handle_t)); in iwh_attach()
981 ddi_regs_map_free(&sc->sc_handle); in iwh_attach()
984 ddi_regs_map_free(&sc->sc_cfg_handle); in iwh_attach()
996 iwh_sc_t *sc; in iwh_detach() local
1000 sc = ddi_get_soft_state(iwh_soft_state_p, ddi_get_instance(dip)); in iwh_detach()
1001 ASSERT(sc != NULL); in iwh_detach()
1002 ic = &sc->sc_ic; in iwh_detach()
1009 atomic_and_32(&sc->sc_flags, ~IWH_F_HW_ERR_RECOVER); in iwh_detach()
1010 atomic_and_32(&sc->sc_flags, ~IWH_F_RATE_AUTO_CTL); in iwh_detach()
1012 atomic_or_32(&sc->sc_flags, IWH_F_SUSPEND); in iwh_detach()
1014 if (sc->sc_flags & IWH_F_RUNNING) { in iwh_detach()
1016 iwh_stop(sc); in iwh_detach()
1027 if (!(sc->sc_flags & IWH_F_ATTACHED)) { in iwh_detach()
1034 sc->sc_mf_thread_switch = 0; in iwh_detach()
1036 mutex_enter(&sc->sc_mt_lock); in iwh_detach()
1037 while (sc->sc_mf_thread != NULL) { in iwh_detach()
1038 if (cv_wait_sig(&sc->sc_mt_cv, &sc->sc_mt_lock) == 0) { in iwh_detach()
1042 mutex_exit(&sc->sc_mt_lock); in iwh_detach()
1044 err = mac_disable(sc->sc_ic.ic_mach); in iwh_detach()
1052 iwh_stop(sc); in iwh_detach()
1059 iwh_release_calib_buffer(sc); in iwh_detach()
1064 (void) mac_unregister(sc->sc_ic.ic_mach); in iwh_detach()
1066 mutex_enter(&sc->sc_glock); in iwh_detach()
1067 iwh_free_fw_dma(sc); in iwh_detach()
1068 iwh_ring_free(sc); in iwh_detach()
1069 iwh_free_kw(sc); in iwh_detach()
1070 iwh_free_shared(sc); in iwh_detach()
1071 mutex_exit(&sc->sc_glock); in iwh_detach()
1073 (void) ddi_intr_disable(sc->sc_intr_htable[0]); in iwh_detach()
1074 (void) ddi_intr_remove_handler(sc->sc_intr_htable[0]); in iwh_detach()
1075 (void) ddi_intr_free(sc->sc_intr_htable[0]); in iwh_detach()
1076 kmem_free(sc->sc_intr_htable, sizeof (ddi_intr_handle_t)); in iwh_detach()
1078 (void) ddi_intr_remove_softint(sc->sc_soft_hdl); in iwh_detach()
1079 sc->sc_soft_hdl = NULL; in iwh_detach()
1084 ieee80211_detach(&sc->sc_ic); in iwh_detach()
1086 iwh_destroy_locks(sc); in iwh_detach()
1088 ddi_regs_map_free(&sc->sc_handle); in iwh_detach()
1089 ddi_regs_map_free(&sc->sc_cfg_handle); in iwh_detach()
1100 iwh_destroy_locks(iwh_sc_t *sc) in iwh_destroy_locks() argument
1102 cv_destroy(&sc->sc_mt_cv); in iwh_destroy_locks()
1103 cv_destroy(&sc->sc_cmd_cv); in iwh_destroy_locks()
1104 cv_destroy(&sc->sc_put_seg_cv); in iwh_destroy_locks()
1105 cv_destroy(&sc->sc_ucode_cv); in iwh_destroy_locks()
1106 mutex_destroy(&sc->sc_mt_lock); in iwh_destroy_locks()
1107 mutex_destroy(&sc->sc_tx_lock); in iwh_destroy_locks()
1108 mutex_destroy(&sc->sc_glock); in iwh_destroy_locks()
1115 iwh_alloc_dma_mem(iwh_sc_t *sc, size_t memsize, in iwh_alloc_dma_mem() argument
1125 err = ddi_dma_alloc_handle(sc->sc_dip, dma_attr_p, in iwh_alloc_dma_mem()
1192 iwh_alloc_fw_dma(iwh_sc_t *sc) in iwh_alloc_fw_dma() argument
1206 t = (char *)(sc->sc_hdr + 1); in iwh_alloc_fw_dma()
1207 err = iwh_alloc_dma_mem(sc, LE_32(sc->sc_hdr->textsz), in iwh_alloc_fw_dma()
1210 &sc->sc_dma_fw_text); in iwh_alloc_fw_dma()
1217 dma_p = &sc->sc_dma_fw_text; in iwh_alloc_fw_dma()
1224 bcopy(t, dma_p->mem_va, LE_32(sc->sc_hdr->textsz)); in iwh_alloc_fw_dma()
1229 t += LE_32(sc->sc_hdr->textsz); in iwh_alloc_fw_dma()
1230 err = iwh_alloc_dma_mem(sc, LE_32(sc->sc_hdr->datasz), in iwh_alloc_fw_dma()
1233 &sc->sc_dma_fw_data); in iwh_alloc_fw_dma()
1240 dma_p = &sc->sc_dma_fw_data; in iwh_alloc_fw_dma()
1247 bcopy(t, dma_p->mem_va, LE_32(sc->sc_hdr->datasz)); in iwh_alloc_fw_dma()
1249 err = iwh_alloc_dma_mem(sc, LE_32(sc->sc_hdr->datasz), in iwh_alloc_fw_dma()
1252 &sc->sc_dma_fw_data_bak); in iwh_alloc_fw_dma()
1259 dma_p = &sc->sc_dma_fw_data_bak; in iwh_alloc_fw_dma()
1267 bcopy(t, dma_p->mem_va, LE_32(sc->sc_hdr->datasz)); in iwh_alloc_fw_dma()
1272 t += LE_32(sc->sc_hdr->datasz); in iwh_alloc_fw_dma()
1273 err = iwh_alloc_dma_mem(sc, LE_32(sc->sc_hdr->init_textsz), in iwh_alloc_fw_dma()
1276 &sc->sc_dma_fw_init_text); in iwh_alloc_fw_dma()
1283 dma_p = &sc->sc_dma_fw_init_text; in iwh_alloc_fw_dma()
1291 bcopy(t, dma_p->mem_va, LE_32(sc->sc_hdr->init_textsz)); in iwh_alloc_fw_dma()
1296 t += LE_32(sc->sc_hdr->init_textsz); in iwh_alloc_fw_dma()
1297 err = iwh_alloc_dma_mem(sc, LE_32(sc->sc_hdr->init_datasz), in iwh_alloc_fw_dma()
1300 &sc->sc_dma_fw_init_data); in iwh_alloc_fw_dma()
1307 dma_p = &sc->sc_dma_fw_init_data; in iwh_alloc_fw_dma()
1315 bcopy(t, dma_p->mem_va, LE_32(sc->sc_hdr->init_datasz)); in iwh_alloc_fw_dma()
1317 sc->sc_boot = t + LE_32(sc->sc_hdr->init_datasz); in iwh_alloc_fw_dma()
1324 iwh_free_fw_dma(iwh_sc_t *sc) in iwh_free_fw_dma() argument
1326 iwh_free_dma_mem(&sc->sc_dma_fw_text); in iwh_free_fw_dma()
1327 iwh_free_dma_mem(&sc->sc_dma_fw_data); in iwh_free_fw_dma()
1328 iwh_free_dma_mem(&sc->sc_dma_fw_data_bak); in iwh_free_fw_dma()
1329 iwh_free_dma_mem(&sc->sc_dma_fw_init_text); in iwh_free_fw_dma()
1330 iwh_free_dma_mem(&sc->sc_dma_fw_init_data); in iwh_free_fw_dma()
1337 iwh_alloc_shared(iwh_sc_t *sc) in iwh_alloc_shared() argument
1347 err = iwh_alloc_dma_mem(sc, sizeof (iwh_shared_t), in iwh_alloc_shared()
1350 &sc->sc_dma_sh); in iwh_alloc_shared()
1355 sc->sc_shared = (iwh_shared_t *)sc->sc_dma_sh.mem_va; in iwh_alloc_shared()
1358 dma_p = &sc->sc_dma_sh; in iwh_alloc_shared()
1368 iwh_free_shared(sc); in iwh_alloc_shared()
1373 iwh_free_shared(iwh_sc_t *sc) in iwh_free_shared() argument
1375 iwh_free_dma_mem(&sc->sc_dma_sh); in iwh_free_shared()
1382 iwh_alloc_kw(iwh_sc_t *sc) in iwh_alloc_kw() argument
1392 err = iwh_alloc_dma_mem(sc, IWH_KW_SIZE, in iwh_alloc_kw()
1395 &sc->sc_dma_kw); in iwh_alloc_kw()
1401 dma_p = &sc->sc_dma_kw; in iwh_alloc_kw()
1411 iwh_free_kw(sc); in iwh_alloc_kw()
1416 iwh_free_kw(iwh_sc_t *sc) in iwh_free_kw() argument
1418 iwh_free_dma_mem(&sc->sc_dma_kw); in iwh_free_kw()
1425 iwh_alloc_rx_ring(iwh_sc_t *sc) in iwh_alloc_rx_ring() argument
1434 ring = &sc->sc_rxq; in iwh_alloc_rx_ring()
1440 err = iwh_alloc_dma_mem(sc, RX_QUEUE_SIZE * sizeof (uint32_t), in iwh_alloc_rx_ring()
1465 err = iwh_alloc_dma_mem(sc, sc->sc_dmabuf_sz, in iwh_alloc_rx_ring()
1497 iwh_free_rx_ring(sc); in iwh_alloc_rx_ring()
1505 iwh_reset_rx_ring(iwh_sc_t *sc) in iwh_reset_rx_ring() argument
1509 iwh_mac_access_enter(sc); in iwh_reset_rx_ring()
1510 IWH_WRITE(sc, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0); in iwh_reset_rx_ring()
1512 if (IWH_READ(sc, FH_MEM_RSSR_RX_STATUS_REG) & (1 << 24)) { in iwh_reset_rx_ring()
1523 iwh_mac_access_exit(sc); in iwh_reset_rx_ring()
1525 sc->sc_rxq.cur = 0; in iwh_reset_rx_ring()
1529 iwh_free_rx_ring(iwh_sc_t *sc) in iwh_free_rx_ring() argument
1534 if (sc->sc_rxq.data[i].dma_data.dma_hdl) { in iwh_free_rx_ring()
1535 IWH_DMA_SYNC(sc->sc_rxq.data[i].dma_data, in iwh_free_rx_ring()
1539 iwh_free_dma_mem(&sc->sc_rxq.data[i].dma_data); in iwh_free_rx_ring()
1542 if (sc->sc_rxq.dma_desc.dma_hdl) { in iwh_free_rx_ring()
1543 IWH_DMA_SYNC(sc->sc_rxq.dma_desc, DDI_DMA_SYNC_FORDEV); in iwh_free_rx_ring()
1546 iwh_free_dma_mem(&sc->sc_rxq.dma_desc); in iwh_free_rx_ring()
1553 iwh_alloc_tx_ring(iwh_sc_t *sc, iwh_tx_ring_t *ring, in iwh_alloc_tx_ring() argument
1576 err = iwh_alloc_dma_mem(sc, in iwh_alloc_tx_ring()
1602 err = iwh_alloc_dma_mem(sc, in iwh_alloc_tx_ring()
1639 err = iwh_alloc_dma_mem(sc, sc->sc_dmabuf_sz, in iwh_alloc_tx_ring()
1678 iwh_reset_tx_ring(iwh_sc_t *sc, iwh_tx_ring_t *ring) in iwh_reset_tx_ring() argument
1683 iwh_mac_access_enter(sc); in iwh_reset_tx_ring()
1685 IWH_WRITE(sc, IWH_FH_TCSR_CHNL_TX_CONFIG_REG(ring->qid), 0); in iwh_reset_tx_ring()
1687 if (IWH_READ(sc, IWH_FH_TSSR_TX_STATUS_REG) & in iwh_reset_tx_ring()
1702 iwh_mac_access_exit(sc); in iwh_reset_tx_ring()
1707 if (!(sc->sc_flags & IWH_F_QUIESCED)) { in iwh_reset_tx_ring()
1750 iwh_ring_init(iwh_sc_t *sc) in iwh_ring_init() argument
1759 err = iwh_alloc_tx_ring(sc, &sc->sc_txq[i], TFD_TX_CMD_SLOTS, in iwh_ring_init()
1769 err = iwh_alloc_tx_ring(sc, &sc->sc_txq[IWH_CMD_QUEUE_NUM], in iwh_ring_init()
1775 err = iwh_alloc_rx_ring(sc); in iwh_ring_init()
1785 iwh_ring_free(iwh_sc_t *sc) in iwh_ring_free() argument
1789 iwh_free_rx_ring(sc); in iwh_ring_free()
1791 iwh_free_tx_ring(&sc->sc_txq[i]); in iwh_ring_free()
1852 iwh_sc_t *sc; in iwh_newstate() local
1863 sc = (iwh_sc_t *)ic; in iwh_newstate()
1867 mutex_enter(&sc->sc_glock); in iwh_newstate()
1873 atomic_or_32(&sc->sc_flags, IWH_F_SCANNING); in iwh_newstate()
1874 iwh_set_led(sc, 2, 10, 2); in iwh_newstate()
1880 sc->sc_config.assoc_id = 0; in iwh_newstate()
1881 sc->sc_config.filter_flags &= in iwh_newstate()
1887 LE_16(sc->sc_config.chan), in iwh_newstate()
1888 LE_32(sc->sc_config.flags), in iwh_newstate()
1889 LE_32(sc->sc_config.filter_flags))); in iwh_newstate()
1891 err = iwh_cmd(sc, REPLY_RXON, &sc->sc_config, in iwh_newstate()
1896 atomic_and_32(&sc->sc_flags, ~IWH_F_SCANNING); in iwh_newstate()
1897 mutex_exit(&sc->sc_glock); in iwh_newstate()
1907 err = iwh_cmd(sc, REPLY_ADD_STA, &node, in iwh_newstate()
1912 atomic_and_32(&sc->sc_flags, ~IWH_F_SCANNING); in iwh_newstate()
1913 mutex_exit(&sc->sc_glock); in iwh_newstate()
1918 mutex_exit(&sc->sc_glock); in iwh_newstate()
1920 err = sc->sc_newstate(ic, nstate, arg); in iwh_newstate()
1921 mutex_enter(&sc->sc_glock); in iwh_newstate()
1922 if ((err != 0) || ((err = iwh_scan(sc)) != 0)) { in iwh_newstate()
1925 atomic_and_32(&sc->sc_flags, ~IWH_F_SCANNING); in iwh_newstate()
1928 mutex_exit(&sc->sc_glock); in iwh_newstate()
1933 sc->sc_clk = 0; in iwh_newstate()
1938 atomic_and_32(&sc->sc_flags, ~IWH_F_SCANNING); in iwh_newstate()
1944 sc->sc_config.assoc_id = 0; in iwh_newstate()
1945 sc->sc_config.filter_flags &= ~LE_32(RXON_FILTER_ASSOC_MSK); in iwh_newstate()
1952 if ((err = iwh_hw_set_before_auth(sc)) != 0) { in iwh_newstate()
1955 mutex_exit(&sc->sc_glock); in iwh_newstate()
1962 atomic_and_32(&sc->sc_flags, ~IWH_F_SCANNING); in iwh_newstate()
1969 iwh_set_led(sc, 2, 10, 10); in iwh_newstate()
1976 err = iwh_run_state_config(sc); in iwh_newstate()
1980 mutex_exit(&sc->sc_glock); in iwh_newstate()
1988 (sc->sc_ht_conf.ht_support) && in iwh_newstate()
1998 (sc->sc_ht_conf.tx_support_mcs[r/8] & in iwh_newstate()
2001 atomic_or_32(&sc->sc_flags, in iwh_newstate()
2008 atomic_or_32(&sc->sc_flags, in iwh_newstate()
2021 atomic_and_32(&sc->sc_flags, in iwh_newstate()
2029 iwh_set_led(sc, 2, 0, 1); in iwh_newstate()
2034 atomic_and_32(&sc->sc_flags, ~IWH_F_SCANNING); in iwh_newstate()
2039 iwh_set_led(sc, 2, 1, 0); in iwh_newstate()
2044 atomic_and_32(&sc->sc_flags, ~IWH_F_SCANNING); in iwh_newstate()
2049 mutex_exit(&sc->sc_glock); in iwh_newstate()
2051 return (sc->sc_newstate(ic, nstate, arg)); in iwh_newstate()
2058 iwh_mac_access_enter(iwh_sc_t *sc) in iwh_mac_access_enter() argument
2063 tmp = IWH_READ(sc, CSR_GP_CNTRL); in iwh_mac_access_enter()
2064 IWH_WRITE(sc, CSR_GP_CNTRL, in iwh_mac_access_enter()
2071 if ((IWH_READ(sc, CSR_GP_CNTRL) & in iwh_mac_access_enter()
2092 iwh_mac_access_exit(iwh_sc_t *sc) in iwh_mac_access_exit() argument
2094 uint32_t tmp = IWH_READ(sc, CSR_GP_CNTRL); in iwh_mac_access_exit()
2095 IWH_WRITE(sc, CSR_GP_CNTRL, in iwh_mac_access_exit()
2113 iwh_mem_write(iwh_sc_t *sc, uint32_t addr, uint32_t data) in iwh_mem_write() argument
2115 IWH_WRITE(sc, HBUS_TARG_MEM_WADDR, addr); in iwh_mem_write()
2116 IWH_WRITE(sc, HBUS_TARG_MEM_WDAT, data); in iwh_mem_write()
2123 iwh_reg_read(iwh_sc_t *sc, uint32_t addr) in iwh_reg_read() argument
2125 IWH_WRITE(sc, HBUS_TARG_PRPH_RADDR, addr | (3 << 24)); in iwh_reg_read()
2126 return (IWH_READ(sc, HBUS_TARG_PRPH_RDAT)); in iwh_reg_read()
2133 iwh_reg_write(iwh_sc_t *sc, uint32_t addr, uint32_t data) in iwh_reg_write() argument
2135 IWH_WRITE(sc, HBUS_TARG_PRPH_WADDR, addr | (3 << 24)); in iwh_reg_write()
2136 IWH_WRITE(sc, HBUS_TARG_PRPH_WDAT, data); in iwh_reg_write()
2148 iwh_load_init_firmware(iwh_sc_t *sc) in iwh_load_init_firmware() argument
2153 atomic_and_32(&sc->sc_flags, ~IWH_F_PUT_SEG); in iwh_load_init_firmware()
2158 err = iwh_put_seg_fw(sc, sc->sc_dma_fw_init_text.cookie.dmac_address, in iwh_load_init_firmware()
2159 RTC_INST_LOWER_BOUND, sc->sc_dma_fw_init_text.cookie.dmac_size); in iwh_load_init_firmware()
2171 while (!(sc->sc_flags & IWH_F_PUT_SEG)) { in iwh_load_init_firmware()
2172 if (cv_timedwait(&sc->sc_put_seg_cv, &sc->sc_glock, clk) < 0) { in iwh_load_init_firmware()
2177 if (!(sc->sc_flags & IWH_F_PUT_SEG)) { in iwh_load_init_firmware()
2183 atomic_and_32(&sc->sc_flags, ~IWH_F_PUT_SEG); in iwh_load_init_firmware()
2188 err = iwh_put_seg_fw(sc, sc->sc_dma_fw_init_data.cookie.dmac_address, in iwh_load_init_firmware()
2189 RTC_DATA_LOWER_BOUND, sc->sc_dma_fw_init_data.cookie.dmac_size); in iwh_load_init_firmware()
2201 while (!(sc->sc_flags & IWH_F_PUT_SEG)) { in iwh_load_init_firmware()
2202 if (cv_timedwait(&sc->sc_put_seg_cv, &sc->sc_glock, clk) < 0) { in iwh_load_init_firmware()
2207 if (!(sc->sc_flags & IWH_F_PUT_SEG)) { in iwh_load_init_firmware()
2213 atomic_and_32(&sc->sc_flags, ~IWH_F_PUT_SEG); in iwh_load_init_firmware()
2219 iwh_load_run_firmware(iwh_sc_t *sc) in iwh_load_run_firmware() argument
2224 atomic_and_32(&sc->sc_flags, ~IWH_F_PUT_SEG); in iwh_load_run_firmware()
2229 err = iwh_put_seg_fw(sc, sc->sc_dma_fw_text.cookie.dmac_address, in iwh_load_run_firmware()
2230 RTC_INST_LOWER_BOUND, sc->sc_dma_fw_text.cookie.dmac_size); in iwh_load_run_firmware()
2242 while (!(sc->sc_flags & IWH_F_PUT_SEG)) { in iwh_load_run_firmware()
2243 if (cv_timedwait(&sc->sc_put_seg_cv, &sc->sc_glock, clk) < 0) { in iwh_load_run_firmware()
2248 if (!(sc->sc_flags & IWH_F_PUT_SEG)) { in iwh_load_run_firmware()
2254 atomic_and_32(&sc->sc_flags, ~IWH_F_PUT_SEG); in iwh_load_run_firmware()
2259 err = iwh_put_seg_fw(sc, sc->sc_dma_fw_data_bak.cookie.dmac_address, in iwh_load_run_firmware()
2260 RTC_DATA_LOWER_BOUND, sc->sc_dma_fw_data.cookie.dmac_size); in iwh_load_run_firmware()
2272 while (!(sc->sc_flags & IWH_F_PUT_SEG)) { in iwh_load_run_firmware()
2273 if (cv_timedwait(&sc->sc_put_seg_cv, &sc->sc_glock, clk) < 0) { in iwh_load_run_firmware()
2278 if (!(sc->sc_flags & IWH_F_PUT_SEG)) { in iwh_load_run_firmware()
2284 atomic_and_32(&sc->sc_flags, ~IWH_F_PUT_SEG); in iwh_load_run_firmware()
2294 iwh_rx_phy_intr(iwh_sc_t *sc, iwh_rx_desc_t *desc) in iwh_rx_phy_intr() argument
2297 sc->sc_rx_phy_res.flag = 1; in iwh_rx_phy_intr()
2299 bcopy((uint8_t *)(desc + 1), sc->sc_rx_phy_res.buf, in iwh_rx_phy_intr()
2308 iwh_rx_mpdu_intr(iwh_sc_t *sc, iwh_rx_desc_t *desc) in iwh_rx_mpdu_intr() argument
2310 ieee80211com_t *ic = &sc->sc_ic; in iwh_rx_mpdu_intr()
2312 iwh_rx_ring_t *ring = &sc->sc_rxq; in iwh_rx_mpdu_intr()
2329 stat = (iwh_rx_phy_res_t *)sc->sc_rx_phy_res.buf; in iwh_rx_mpdu_intr()
2377 if ((len < 16) || (len > sc->sc_dmabuf_sz)) { in iwh_rx_mpdu_intr()
2392 sc->sc_rx_err++; in iwh_rx_mpdu_intr()
2400 sc->sc_assoc_id = *((uint16_t *)(wh + 1) + 2); in iwh_rx_mpdu_intr()
2403 sc->sc_assoc_id)); in iwh_rx_mpdu_intr()
2423 sc->sc_rx_nobuf++; in iwh_rx_mpdu_intr()
2438 iwh_tx_intr(iwh_sc_t *sc, iwh_rx_desc_t *desc) in iwh_tx_intr() argument
2440 ieee80211com_t *ic = &sc->sc_ic; in iwh_tx_intr()
2441 iwh_tx_ring_t *ring = &sc->sc_txq[desc->hdr.qid & 0x3]; in iwh_tx_intr()
2457 sc->sc_tx_retries++; in iwh_tx_intr()
2460 sc->sc_tx_retries)); in iwh_tx_intr()
2463 mutex_enter(&sc->sc_mt_lock); in iwh_tx_intr()
2464 sc->sc_tx_timer = 0; in iwh_tx_intr()
2465 mutex_exit(&sc->sc_mt_lock); in iwh_tx_intr()
2467 mutex_enter(&sc->sc_tx_lock); in iwh_tx_intr()
2474 if ((sc->sc_need_reschedule) && (ring->queued <= (ring->count >> 3))) { in iwh_tx_intr()
2475 sc->sc_need_reschedule = 0; in iwh_tx_intr()
2476 mutex_exit(&sc->sc_tx_lock); in iwh_tx_intr()
2478 mutex_enter(&sc->sc_tx_lock); in iwh_tx_intr()
2481 mutex_exit(&sc->sc_tx_lock); in iwh_tx_intr()
2488 iwh_cmd_intr(iwh_sc_t *sc, iwh_rx_desc_t *desc) in iwh_cmd_intr() argument
2494 if (sc->sc_cmd_accum > 0) { in iwh_cmd_intr()
2495 sc->sc_cmd_accum--; in iwh_cmd_intr()
2499 mutex_enter(&sc->sc_glock); in iwh_cmd_intr()
2501 sc->sc_cmd_flag = SC_CMD_FLG_DONE; in iwh_cmd_intr()
2503 cv_signal(&sc->sc_cmd_cv); in iwh_cmd_intr()
2505 mutex_exit(&sc->sc_glock); in iwh_cmd_intr()
2517 iwh_ucode_alive(iwh_sc_t *sc, iwh_rx_desc_t *desc) in iwh_ucode_alive() argument
2523 struct iwh_calib_results *res_p = &sc->sc_calib_results; in iwh_ucode_alive()
2547 bcopy(ar, &sc->sc_card_alive_init, in iwh_ucode_alive()
2553 mutex_enter(&sc->sc_glock); in iwh_ucode_alive()
2555 rv = iwh_alive_common(sc); in iwh_ucode_alive()
2559 mutex_exit(&sc->sc_glock); in iwh_ucode_alive()
2573 rv = iwh_cmd(sc, CALIBRATION_CFG_CMD, &cmd, sizeof (cmd), 1); in iwh_ucode_alive()
2577 mutex_exit(&sc->sc_glock); in iwh_ucode_alive()
2581 mutex_exit(&sc->sc_glock); in iwh_ucode_alive()
2588 bcopy(ar, &sc->sc_card_alive_run, in iwh_ucode_alive()
2591 mutex_enter(&sc->sc_glock); in iwh_ucode_alive()
2596 rv = iwh_alive_common(sc); in iwh_ucode_alive()
2600 mutex_exit(&sc->sc_glock); in iwh_ucode_alive()
2608 rv = iwh_cmd(sc, REPLY_PHY_CALIBRATION_CMD, in iwh_ucode_alive()
2614 mutex_exit(&sc->sc_glock); in iwh_ucode_alive()
2625 rv = iwh_cmd(sc, REPLY_PHY_CALIBRATION_CMD, in iwh_ucode_alive()
2631 mutex_exit(&sc->sc_glock); in iwh_ucode_alive()
2642 rv = iwh_cmd(sc, REPLY_PHY_CALIBRATION_CMD, in iwh_ucode_alive()
2649 mutex_exit(&sc->sc_glock); in iwh_ucode_alive()
2660 rv = iwh_cmd(sc, REPLY_PHY_CALIBRATION_CMD, in iwh_ucode_alive()
2667 mutex_exit(&sc->sc_glock); in iwh_ucode_alive()
2678 rv = iwh_cmd(sc, REPLY_PHY_CALIBRATION_CMD, in iwh_ucode_alive()
2685 mutex_exit(&sc->sc_glock); in iwh_ucode_alive()
2692 atomic_or_32(&sc->sc_flags, IWH_F_FW_INIT); in iwh_ucode_alive()
2693 cv_signal(&sc->sc_ucode_cv); in iwh_ucode_alive()
2695 mutex_exit(&sc->sc_glock); in iwh_ucode_alive()
2708 iwh_sc_t *sc; in iwh_rx_softintr() local
2717 sc = (iwh_sc_t *)arg; in iwh_rx_softintr()
2718 ic = &sc->sc_ic; in iwh_rx_softintr()
2724 index = (sc->sc_shared->val0) & 0xfff; in iwh_rx_softintr()
2726 while (sc->sc_rxq.cur != index) { in iwh_rx_softintr()
2727 data = &sc->sc_rxq.data[sc->sc_rxq.cur]; in iwh_rx_softintr()
2733 index, sc->sc_rxq.cur, desc->hdr.qid, desc->hdr.idx, in iwh_rx_softintr()
2742 iwh_cmd_intr(sc, desc); in iwh_rx_softintr()
2747 iwh_rx_phy_intr(sc, desc); in iwh_rx_softintr()
2751 iwh_rx_mpdu_intr(sc, desc); in iwh_rx_softintr()
2755 iwh_tx_intr(sc, desc); in iwh_rx_softintr()
2759 iwh_ucode_alive(sc, desc); in iwh_rx_softintr()
2779 sc->sc_ostate = sc->sc_ic.ic_state; in iwh_rx_softintr()
2780 ieee80211_new_state(&sc->sc_ic, in iwh_rx_softintr()
2782 atomic_or_32(&sc->sc_flags, in iwh_rx_softintr()
2813 sc->sc_scan_pending++; in iwh_rx_softintr()
2826 iwh_save_calib_result(sc, desc); in iwh_rx_softintr()
2830 mutex_enter(&sc->sc_glock); in iwh_rx_softintr()
2831 atomic_or_32(&sc->sc_flags, IWH_F_FW_INIT); in iwh_rx_softintr()
2832 cv_signal(&sc->sc_ucode_cv); in iwh_rx_softintr()
2833 mutex_exit(&sc->sc_glock); in iwh_rx_softintr()
2841 sc->sc_rxq.cur = (sc->sc_rxq.cur + 1) % RX_QUEUE_SIZE; in iwh_rx_softintr()
2849 IWH_WRITE(sc, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, index & (~7)); in iwh_rx_softintr()
2854 IWH_WRITE(sc, CSR_INT_MASK, CSR_INI_SET_MASK); in iwh_rx_softintr()
2866 iwh_sc_t *sc; in iwh_intr() local
2872 sc = (iwh_sc_t *)arg; in iwh_intr()
2874 r = IWH_READ(sc, CSR_INT); in iwh_intr()
2882 rfh = IWH_READ(sc, CSR_FH_INT_STATUS); in iwh_intr()
2890 IWH_WRITE(sc, CSR_INT_MASK, 0); in iwh_intr()
2895 IWH_WRITE(sc, CSR_INT, r); in iwh_intr()
2896 IWH_WRITE(sc, CSR_FH_INT_STATUS, rfh); in iwh_intr()
2901 iwh_stop(sc); in iwh_intr()
2902 sc->sc_ostate = sc->sc_ic.ic_state; in iwh_intr()
2907 if (!IWH_CHK_FAST_RECOVER(sc)) { in iwh_intr()
2908 ieee80211_new_state(&sc->sc_ic, IEEE80211_S_INIT, -1); in iwh_intr()
2911 atomic_or_32(&sc->sc_flags, IWH_F_HW_ERR_RECOVER); in iwh_intr()
2916 uint32_t tmp = IWH_READ(sc, CSR_GP_CNTRL); in iwh_intr()
2924 (void) ddi_intr_trigger_softint(sc->sc_soft_hdl, NULL); in iwh_intr()
2929 mutex_enter(&sc->sc_glock); in iwh_intr()
2930 atomic_or_32(&sc->sc_flags, IWH_F_PUT_SEG); in iwh_intr()
2931 cv_signal(&sc->sc_put_seg_cv); in iwh_intr()
2932 mutex_exit(&sc->sc_glock); in iwh_intr()
2945 IWH_WRITE(sc, CSR_INT_MASK, CSR_INI_SET_MASK); in iwh_intr()
3024 iwh_sc_t *sc; in iwh_m_tx() local
3031 sc = (iwh_sc_t *)arg; in iwh_m_tx()
3032 ic = &sc->sc_ic; in iwh_m_tx()
3034 if (sc->sc_flags & IWH_F_SUSPEND) { in iwh_m_tx()
3044 if ((sc->sc_flags & IWH_F_HW_ERR_RECOVER) && in iwh_m_tx()
3045 IWH_CHK_FAST_RECOVER(sc)) { in iwh_m_tx()
3070 iwh_sc_t *sc; in iwh_send() local
3091 sc = (iwh_sc_t *)ic; in iwh_send()
3093 if (sc->sc_flags & IWH_F_SUSPEND) { in iwh_send()
3116 sc->sc_tx_err++; in iwh_send()
3139 sc->sc_tx_err++; in iwh_send()
3159 mutex_enter(&sc->sc_tx_lock); in iwh_send()
3160 ring = &sc->sc_txq[txq_id]; in iwh_send()
3174 sc->sc_need_reschedule = 1; in iwh_send()
3175 mutex_exit(&sc->sc_tx_lock); in iwh_send()
3181 sc->sc_tx_nobuf++; in iwh_send()
3188 mutex_exit(&sc->sc_tx_lock); in iwh_send()
3198 mutex_enter(&sc->sc_tx_lock); in iwh_send()
3200 if ((sc->sc_need_reschedule) && (ring->queued <= 0)) { in iwh_send()
3201 sc->sc_need_reschedule = 0; in iwh_send()
3202 mutex_exit(&sc->sc_tx_lock); in iwh_send()
3204 mutex_enter(&sc->sc_tx_lock); in iwh_send()
3206 mutex_exit(&sc->sc_tx_lock); in iwh_send()
3250 sc->sc_tx_err++; in iwh_send()
3252 mutex_enter(&sc->sc_tx_lock); in iwh_send()
3254 if ((sc->sc_need_reschedule) && (ring->queued <= 0)) { in iwh_send()
3255 sc->sc_need_reschedule = 0; in iwh_send()
3256 mutex_exit(&sc->sc_tx_lock); in iwh_send()
3258 mutex_enter(&sc->sc_tx_lock); in iwh_send()
3260 mutex_exit(&sc->sc_tx_lock); in iwh_send()
3335 (sc->sc_ht_conf.ht_support)) { in iwh_send()
3377 (sc->sc_ht_conf.ht_support) && in iwh_send()
3426 mutex_enter(&sc->sc_tx_lock); in iwh_send()
3449 sc->sc_shared->queues_byte_cnt_tbls[ring->qid]. in iwh_send()
3453 sc->sc_shared->queues_byte_cnt_tbls[ring->qid]. in iwh_send()
3462 IWH_WRITE(sc, HBUS_TARG_WRPTR, ring->qid << 8 | ring->desc_cur); in iwh_send()
3464 mutex_exit(&sc->sc_tx_lock); in iwh_send()
3475 mutex_enter(&sc->sc_mt_lock); in iwh_send()
3476 if (0 == sc->sc_tx_timer) { in iwh_send()
3477 sc->sc_tx_timer = 4; in iwh_send()
3479 mutex_exit(&sc->sc_mt_lock); in iwh_send()
3491 iwh_sc_t *sc; in iwh_m_ioctl() local
3498 sc = (iwh_sc_t *)arg; in iwh_m_ioctl()
3499 ic = &sc->sc_ic; in iwh_m_ioctl()
3512 if (sc->sc_flags & IWH_F_RUNNING) { in iwh_m_ioctl()
3513 iwh_m_stop(sc); in iwh_m_ioctl()
3514 (void) iwh_m_start(sc); in iwh_m_ioctl()
3529 iwh_sc_t *sc; in iwh_m_getprop() local
3535 sc = (iwh_sc_t *)arg; in iwh_m_getprop()
3537 err = ieee80211_getprop(&sc->sc_ic, pr_name, wldp_pr_num, in iwh_m_getprop()
3547 iwh_sc_t *sc = (iwh_sc_t *)arg; in iwh_m_propinfo() local
3549 ieee80211_propinfo(&sc->sc_ic, pr_name, wldp_pr_num, mph); in iwh_m_propinfo()
3556 iwh_sc_t *sc; in iwh_m_setprop() local
3563 sc = (iwh_sc_t *)arg; in iwh_m_setprop()
3564 ic = &sc->sc_ic; in iwh_m_setprop()
3571 if (sc->sc_flags & IWH_F_RUNNING) { in iwh_m_setprop()
3572 iwh_m_stop(sc); in iwh_m_setprop()
3573 (void) iwh_m_start(sc); in iwh_m_setprop()
3589 iwh_sc_t *sc; in iwh_m_stat() local
3596 sc = (iwh_sc_t *)arg; in iwh_m_stat()
3597 ic = &sc->sc_ic; in iwh_m_stat()
3599 mutex_enter(&sc->sc_glock); in iwh_m_stat()
3610 *val = sc->sc_tx_nobuf; in iwh_m_stat()
3614 *val = sc->sc_rx_nobuf; in iwh_m_stat()
3618 *val = sc->sc_rx_err; in iwh_m_stat()
3639 *val = sc->sc_tx_err; in iwh_m_stat()
3643 *val = sc->sc_tx_retries; in iwh_m_stat()
3656 mutex_exit(&sc->sc_glock); in iwh_m_stat()
3660 mutex_exit(&sc->sc_glock); in iwh_m_stat()
3664 mutex_exit(&sc->sc_glock); in iwh_m_stat()
3675 iwh_sc_t *sc; in iwh_m_start() local
3682 sc = (iwh_sc_t *)arg; in iwh_m_start()
3683 ic = &sc->sc_ic; in iwh_m_start()
3685 err = iwh_init(sc); in iwh_m_start()
3692 atomic_or_32(&sc->sc_flags, IWH_F_HW_ERR_RECOVER); in iwh_m_start()
3698 atomic_or_32(&sc->sc_flags, IWH_F_RUNNING); in iwh_m_start()
3709 iwh_sc_t *sc; in iwh_m_stop() local
3715 sc = (iwh_sc_t *)arg; in iwh_m_stop()
3716 ic = &sc->sc_ic; in iwh_m_stop()
3718 iwh_stop(sc); in iwh_m_stop()
3723 iwh_release_calib_buffer(sc); in iwh_m_stop()
3727 atomic_and_32(&sc->sc_flags, ~IWH_F_HW_ERR_RECOVER); in iwh_m_stop()
3728 atomic_and_32(&sc->sc_flags, ~IWH_F_RATE_AUTO_CTL); in iwh_m_stop()
3730 atomic_and_32(&sc->sc_flags, ~IWH_F_RUNNING); in iwh_m_stop()
3731 atomic_and_32(&sc->sc_flags, ~IWH_F_SCANNING); in iwh_m_stop()
3740 iwh_sc_t *sc; in iwh_m_unicst() local
3747 sc = (iwh_sc_t *)arg; in iwh_m_unicst()
3748 ic = &sc->sc_ic; in iwh_m_unicst()
3752 mutex_enter(&sc->sc_glock); in iwh_m_unicst()
3753 err = iwh_config(sc); in iwh_m_unicst()
3754 mutex_exit(&sc->sc_glock); in iwh_m_unicst()
3784 iwh_thread(iwh_sc_t *sc) in iwh_thread() argument
3786 ieee80211com_t *ic = &sc->sc_ic; in iwh_thread()
3794 while (sc->sc_mf_thread_switch) { in iwh_thread()
3795 tmp = IWH_READ(sc, CSR_GP_CNTRL); in iwh_thread()
3797 atomic_and_32(&sc->sc_flags, ~IWH_F_RADIO_OFF); in iwh_thread()
3799 atomic_or_32(&sc->sc_flags, IWH_F_RADIO_OFF); in iwh_thread()
3805 if (sc->sc_flags & IWH_F_RADIO_OFF) { in iwh_thread()
3814 (sc->sc_flags & IWH_F_HW_ERR_RECOVER)) { in iwh_thread()
3819 iwh_stop(sc); in iwh_thread()
3821 if (IWH_CHK_FAST_RECOVER(sc)) { in iwh_thread()
3825 bcopy(&sc->sc_config, &sc->sc_config_save, in iwh_thread()
3826 sizeof (sc->sc_config)); in iwh_thread()
3832 err = iwh_init(sc); in iwh_thread()
3842 atomic_or_32(&sc->sc_flags, IWH_F_RUNNING); in iwh_thread()
3846 if (!IWH_CHK_FAST_RECOVER(sc) || in iwh_thread()
3847 iwh_fast_recover(sc) != IWH_SUCCESS) { in iwh_thread()
3848 atomic_and_32(&sc->sc_flags, in iwh_thread()
3852 if (sc->sc_ostate != IEEE80211_S_INIT) { in iwh_thread()
3860 (sc->sc_flags & IWH_F_SCANNING) && sc->sc_scan_pending) { in iwh_thread()
3864 sc->sc_scan_pending--; in iwh_thread()
3873 (sc->sc_flags & IWH_F_RATE_AUTO_CTL)) { in iwh_thread()
3875 if (clk > sc->sc_clk + drv_usectohz(1000000)) { in iwh_thread()
3876 iwh_amrr_timeout(sc); in iwh_thread()
3889 mutex_enter(&sc->sc_mt_lock); in iwh_thread()
3890 if (sc->sc_tx_timer) { in iwh_thread()
3893 sc->sc_tx_timer--; in iwh_thread()
3894 if (0 == sc->sc_tx_timer) { in iwh_thread()
3895 atomic_or_32(&sc->sc_flags, in iwh_thread()
3897 sc->sc_ostate = IEEE80211_S_RUN; in iwh_thread()
3905 mutex_exit(&sc->sc_mt_lock); in iwh_thread()
3908 mutex_enter(&sc->sc_mt_lock); in iwh_thread()
3909 sc->sc_mf_thread = NULL; in iwh_thread()
3910 cv_signal(&sc->sc_mt_cv); in iwh_thread()
3911 mutex_exit(&sc->sc_mt_lock); in iwh_thread()
3918 iwh_cmd(iwh_sc_t *sc, int code, const void *buf, int size, int async) in iwh_cmd() argument
3920 iwh_tx_ring_t *ring = &sc->sc_txq[IWH_CMD_QUEUE_NUM]; in iwh_cmd()
3925 ASSERT(mutex_owned(&sc->sc_glock)); in iwh_cmd()
3945 sc->sc_cmd_accum++; in iwh_cmd()
3951 sc->sc_shared->queues_byte_cnt_tbls[ring->qid]. in iwh_cmd()
3954 sc->sc_shared->queues_byte_cnt_tbls[ring->qid]. in iwh_cmd()
3958 IWH_WRITE(sc, HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur); in iwh_cmd()
3966 while (sc->sc_cmd_flag != SC_CMD_FLG_DONE) { in iwh_cmd()
3967 if (cv_timedwait(&sc->sc_cmd_cv, in iwh_cmd()
3968 &sc->sc_glock, clk) < 0) { in iwh_cmd()
3973 if (SC_CMD_FLG_DONE == sc->sc_cmd_flag) { in iwh_cmd()
3974 sc->sc_cmd_flag = SC_CMD_FLG_NONE; in iwh_cmd()
3977 sc->sc_cmd_flag = SC_CMD_FLG_NONE; in iwh_cmd()
3987 iwh_set_led(iwh_sc_t *sc, uint8_t id, uint8_t off, uint8_t on) in iwh_set_led() argument
3996 (void) iwh_cmd(sc, REPLY_LEDS_CMD, &led, sizeof (led), 1); in iwh_set_led()
4003 iwh_hw_set_before_auth(iwh_sc_t *sc) in iwh_hw_set_before_auth() argument
4005 ieee80211com_t *ic = &sc->sc_ic; in iwh_hw_set_before_auth()
4013 IEEE80211_ADDR_COPY(sc->sc_config.bssid, in->in_bssid); in iwh_hw_set_before_auth()
4014 sc->sc_config.chan = LE_16(ieee80211_chan2ieee(ic, in->in_chan)); in iwh_hw_set_before_auth()
4018 sc->sc_config.ofdm_ht_triple_stream_basic_rates = 0; in iwh_hw_set_before_auth()
4019 sc->sc_config.ofdm_ht_dual_stream_basic_rates = 0; in iwh_hw_set_before_auth()
4020 sc->sc_config.ofdm_ht_single_stream_basic_rates = 0; in iwh_hw_set_before_auth()
4023 sc->sc_config.cck_basic_rates = 0x03; in iwh_hw_set_before_auth()
4024 sc->sc_config.ofdm_basic_rates = 0; in iwh_hw_set_before_auth()
4027 sc->sc_config.cck_basic_rates = 0; in iwh_hw_set_before_auth()
4028 sc->sc_config.ofdm_basic_rates = 0x15; in iwh_hw_set_before_auth()
4030 sc->sc_config.cck_basic_rates = 0x0f; in iwh_hw_set_before_auth()
4031 sc->sc_config.ofdm_basic_rates = 0xff; in iwh_hw_set_before_auth()
4035 sc->sc_config.flags &= ~LE_32(RXON_FLG_SHORT_PREAMBLE_MSK | in iwh_hw_set_before_auth()
4039 sc->sc_config.flags |= LE_32(RXON_FLG_SHORT_SLOT_MSK); in iwh_hw_set_before_auth()
4041 sc->sc_config.flags &= LE_32(~RXON_FLG_SHORT_SLOT_MSK); in iwh_hw_set_before_auth()
4045 sc->sc_config.flags |= LE_32(RXON_FLG_SHORT_PREAMBLE_MSK); in iwh_hw_set_before_auth()
4047 sc->sc_config.flags &= LE_32(~RXON_FLG_SHORT_PREAMBLE_MSK); in iwh_hw_set_before_auth()
4054 LE_16(sc->sc_config.chan), LE_32(sc->sc_config.flags), in iwh_hw_set_before_auth()
4055 LE_32(sc->sc_config.filter_flags), in iwh_hw_set_before_auth()
4056 sc->sc_config.cck_basic_rates, sc->sc_config.ofdm_basic_rates, in iwh_hw_set_before_auth()
4057 sc->sc_config.bssid[0], sc->sc_config.bssid[1], in iwh_hw_set_before_auth()
4058 sc->sc_config.bssid[2], sc->sc_config.bssid[3], in iwh_hw_set_before_auth()
4059 sc->sc_config.bssid[4], sc->sc_config.bssid[5])); in iwh_hw_set_before_auth()
4061 err = iwh_cmd(sc, REPLY_RXON, &sc->sc_config, in iwh_hw_set_before_auth()
4065 "failed to config chan%d\n", sc->sc_config.chan); in iwh_hw_set_before_auth()
4069 if ((sc->sc_dev_id != 0x423c) && in iwh_hw_set_before_auth()
4070 (sc->sc_dev_id != 0x423d)) { in iwh_hw_set_before_auth()
4071 err = iwh_tx_power_table(sc, 1); in iwh_hw_set_before_auth()
4080 err = iwh_add_ap_sta(sc); in iwh_hw_set_before_auth()
4085 if ((sc->sc_dev_id != 0x423c) && in iwh_hw_set_before_auth()
4086 (sc->sc_dev_id != 0x423d)) { in iwh_hw_set_before_auth()
4090 err = iwh_ap_lq(sc); in iwh_hw_set_before_auth()
4103 iwh_scan(iwh_sc_t *sc) in iwh_scan() argument
4105 ieee80211com_t *ic = &sc->sc_ic; in iwh_scan()
4106 iwh_tx_ring_t *ring = &sc->sc_txq[IWH_CMD_QUEUE_NUM]; in iwh_scan()
4269 sc->sc_shared->queues_byte_cnt_tbls[ring->qid] in iwh_scan()
4272 sc->sc_shared->queues_byte_cnt_tbls[ring->qid]. in iwh_scan()
4280 IWH_WRITE(sc, HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur); in iwh_scan()
4289 iwh_config(iwh_sc_t *sc) in iwh_config() argument
4291 ieee80211com_t *ic = &sc->sc_ic; in iwh_config()
4306 err = iwh_cmd(sc, POWER_TABLE_CMD, &powertable, in iwh_config()
4321 err = iwh_cmd(sc, REPLY_BT_CONFIG, &bt, in iwh_config()
4332 (void) memset(&sc->sc_config, 0, sizeof (iwh_rxon_cmd_t)); in iwh_config()
4333 IEEE80211_ADDR_COPY(sc->sc_config.node_addr, ic->ic_macaddr); in iwh_config()
4334 IEEE80211_ADDR_COPY(sc->sc_config.wlap_bssid, ic->ic_macaddr); in iwh_config()
4335 sc->sc_config.chan = LE_16(ieee80211_chan2ieee(ic, ic->ic_curchan)); in iwh_config()
4336 sc->sc_config.flags = LE_32(RXON_FLG_BAND_24G_MSK); in iwh_config()
4337 sc->sc_config.flags &= LE_32(~(RXON_FLG_CHANNEL_MODE_MIXED_MSK | in iwh_config()
4342 sc->sc_config.dev_type = RXON_DEV_TYPE_ESS; in iwh_config()
4343 sc->sc_config.filter_flags |= LE_32(RXON_FILTER_ACCEPT_GRP_MSK | in iwh_config()
4350 sc->sc_config.dev_type = RXON_DEV_TYPE_IBSS; in iwh_config()
4352 sc->sc_config.flags |= LE_32(RXON_FLG_SHORT_PREAMBLE_MSK); in iwh_config()
4353 sc->sc_config.filter_flags = LE_32(RXON_FILTER_ACCEPT_GRP_MSK | in iwh_config()
4359 sc->sc_config.dev_type = RXON_DEV_TYPE_AP; in iwh_config()
4363 sc->sc_config.dev_type = RXON_DEV_TYPE_SNIFFER; in iwh_config()
4364 sc->sc_config.filter_flags |= LE_32(RXON_FILTER_ACCEPT_GRP_MSK | in iwh_config()
4372 sc->sc_config.cck_basic_rates = 0x0f; in iwh_config()
4377 sc->sc_config.ofdm_basic_rates = 0xff; in iwh_config()
4382 switch (sc->sc_ht_conf.rx_stream_count) { in iwh_config()
4384 sc->sc_config.ofdm_ht_triple_stream_basic_rates = 0xff; in iwh_config()
4385 sc->sc_config.ofdm_ht_dual_stream_basic_rates = 0xff; in iwh_config()
4386 sc->sc_config.ofdm_ht_single_stream_basic_rates = 0xff; in iwh_config()
4389 sc->sc_config.ofdm_ht_dual_stream_basic_rates = 0xff; in iwh_config()
4390 sc->sc_config.ofdm_ht_single_stream_basic_rates = 0xff; in iwh_config()
4393 sc->sc_config.ofdm_ht_single_stream_basic_rates = 0xff; in iwh_config()
4398 sc->sc_ht_conf.rx_stream_count); in iwh_config()
4405 iwh_config_rxon_chain(sc); in iwh_config()
4407 err = iwh_cmd(sc, REPLY_RXON, &sc->sc_config, in iwh_config()
4422 err = iwh_cmd(sc, REPLY_REMOVE_STA, &rm_sta, sizeof (iwh_rem_sta_t), 0); in iwh_config()
4429 if ((sc->sc_dev_id != 0x423c) && in iwh_config()
4430 (sc->sc_dev_id != 0x423d)) { in iwh_config()
4434 err = iwh_tx_power_table(sc, 0); in iwh_config()
4449 err = iwh_cmd(sc, REPLY_ADD_STA, &node, sizeof (node), 0); in iwh_config()
4456 if ((sc->sc_dev_id != 0x423c) && in iwh_config()
4457 (sc->sc_dev_id != 0x423d)) { in iwh_config()
4475 err = iwh_cmd(sc, REPLY_TX_LINK_QUALITY_CMD, &link_quality, in iwh_config()
4498 iwh_sc_t *sc; in iwh_quiesce() local
4500 sc = ddi_get_soft_state(iwh_soft_state_p, ddi_get_instance(dip)); in iwh_quiesce()
4501 if (sc == NULL) { in iwh_quiesce()
4516 atomic_or_32(&sc->sc_flags, IWH_F_QUIESCED); in iwh_quiesce()
4521 iwh_stop(sc); in iwh_quiesce()
4527 iwh_stop_master(iwh_sc_t *sc) in iwh_stop_master() argument
4532 tmp = IWH_READ(sc, CSR_RESET); in iwh_stop_master()
4533 IWH_WRITE(sc, CSR_RESET, tmp | CSR_RESET_REG_FLAG_STOP_MASTER); in iwh_stop_master()
4535 tmp = IWH_READ(sc, CSR_GP_CNTRL); in iwh_stop_master()
4542 if (IWH_READ(sc, CSR_RESET) & in iwh_stop_master()
4558 iwh_power_up(iwh_sc_t *sc) in iwh_power_up() argument
4562 iwh_mac_access_enter(sc); in iwh_power_up()
4563 tmp = iwh_reg_read(sc, ALM_APMG_PS_CTL); in iwh_power_up()
4566 iwh_reg_write(sc, ALM_APMG_PS_CTL, tmp); in iwh_power_up()
4567 iwh_mac_access_exit(sc); in iwh_power_up()
4577 iwh_preinit(iwh_sc_t *sc) in iwh_preinit() argument
4587 IWH_WRITE(sc, CSR_INT, 0xffffffff); in iwh_preinit()
4589 tmp = IWH_READ(sc, CSR_GIO_CHICKEN_BITS); in iwh_preinit()
4590 IWH_WRITE(sc, CSR_GIO_CHICKEN_BITS, in iwh_preinit()
4593 tmp = IWH_READ(sc, CSR_ANA_PLL_CFG); in iwh_preinit()
4594 IWH_WRITE(sc, CSR_ANA_PLL_CFG, tmp | IWH_CSR_ANA_PLL_CFG); in iwh_preinit()
4596 tmp = IWH_READ(sc, CSR_GP_CNTRL); in iwh_preinit()
4597 IWH_WRITE(sc, CSR_GP_CNTRL, tmp | CSR_GP_CNTRL_REG_FLAG_INIT_DONE); in iwh_preinit()
4603 if (IWH_READ(sc, CSR_GP_CNTRL) & in iwh_preinit()
4614 iwh_mac_access_enter(sc); in iwh_preinit()
4616 iwh_reg_write(sc, ALM_APMG_CLK_EN, APMG_CLK_REG_VAL_DMA_CLK_RQT); in iwh_preinit()
4619 tmp = iwh_reg_read(sc, ALM_APMG_PCIDEV_STT); in iwh_preinit()
4620 iwh_reg_write(sc, ALM_APMG_PCIDEV_STT, tmp | in iwh_preinit()
4622 iwh_mac_access_exit(sc); in iwh_preinit()
4624 radio_cfg = IWH_READ_EEP_SHORT(sc, EEP_SP_RADIO_CONFIGURATION); in iwh_preinit()
4626 tmp = IWH_READ(sc, CSR_HW_IF_CONFIG_REG); in iwh_preinit()
4627 IWH_WRITE(sc, CSR_HW_IF_CONFIG_REG, in iwh_preinit()
4638 IWH_WRITE(sc, CSR_INT_COALESCING, 512 / 32); in iwh_preinit()
4640 (void) iwh_power_up(sc); in iwh_preinit()
4642 if ((sc->sc_rev & 0x80) == 0x80 && (sc->sc_rev & 0x7f) < 8) { in iwh_preinit()
4643 tmp = ddi_get32(sc->sc_cfg_handle, in iwh_preinit()
4644 (uint32_t *)(sc->sc_cfg_base + 0xe8)); in iwh_preinit()
4645 ddi_put32(sc->sc_cfg_handle, in iwh_preinit()
4646 (uint32_t *)(sc->sc_cfg_base + 0xe8), in iwh_preinit()
4650 vlink = ddi_get8(sc->sc_cfg_handle, in iwh_preinit()
4651 (uint8_t *)(sc->sc_cfg_base + 0xf0)); in iwh_preinit()
4652 ddi_put8(sc->sc_cfg_handle, (uint8_t *)(sc->sc_cfg_base + 0xf0), in iwh_preinit()
4655 tmp = IWH_READ(sc, CSR_HW_IF_CONFIG_REG); in iwh_preinit()
4658 IWH_WRITE(sc, CSR_SW_VER, tmp); in iwh_preinit()
4663 iwh_mac_access_enter(sc); in iwh_preinit()
4664 tmp = iwh_reg_read(sc, ALM_APMG_PS_CTL); in iwh_preinit()
4666 iwh_reg_write(sc, ALM_APMG_PS_CTL, tmp); in iwh_preinit()
4669 tmp = iwh_reg_read(sc, ALM_APMG_PS_CTL); in iwh_preinit()
4671 iwh_reg_write(sc, ALM_APMG_PS_CTL, tmp); in iwh_preinit()
4672 iwh_mac_access_exit(sc); in iwh_preinit()
4681 iwh_eep_sem_down(iwh_sc_t *sc) in iwh_eep_sem_down() argument
4687 tmp = IWH_READ(sc, CSR_HW_IF_CONFIG_REG); in iwh_eep_sem_down()
4688 IWH_WRITE(sc, CSR_HW_IF_CONFIG_REG, in iwh_eep_sem_down()
4692 if (IWH_READ(sc, CSR_HW_IF_CONFIG_REG) & in iwh_eep_sem_down()
4707 iwh_eep_sem_up(iwh_sc_t *sc) in iwh_eep_sem_up() argument
4711 tmp = IWH_READ(sc, CSR_HW_IF_CONFIG_REG); in iwh_eep_sem_up()
4712 IWH_WRITE(sc, CSR_HW_IF_CONFIG_REG, in iwh_eep_sem_up()
4720 iwh_eep_load(iwh_sc_t *sc) in iwh_eep_load() argument
4724 uint16_t addr, eep_sz = sizeof (sc->sc_eep_map); in iwh_eep_load()
4725 uint16_t *eep_p = (uint16_t *)&sc->sc_eep_map; in iwh_eep_load()
4730 eep_gp = IWH_READ(sc, CSR_EEPROM_GP); in iwh_eep_load()
4738 rr = iwh_eep_sem_down(sc); in iwh_eep_load()
4746 IWH_WRITE(sc, CSR_EEPROM_REG, addr<<1); in iwh_eep_load()
4747 tmp = IWH_READ(sc, CSR_EEPROM_REG); in iwh_eep_load()
4748 IWH_WRITE(sc, CSR_EEPROM_REG, tmp & ~(0x2)); in iwh_eep_load()
4751 rv = IWH_READ(sc, CSR_EEPROM_REG); in iwh_eep_load()
4761 iwh_eep_sem_up(sc); in iwh_eep_load()
4768 iwh_eep_sem_up(sc); in iwh_eep_load()
4776 iwh_get_mac_from_eep(iwh_sc_t *sc) in iwh_get_mac_from_eep() argument
4778 ieee80211com_t *ic = &sc->sc_ic; in iwh_get_mac_from_eep()
4780 IEEE80211_ADDR_COPY(ic->ic_macaddr, &sc->sc_eep_map[EEP_MAC_ADDRESS]); in iwh_get_mac_from_eep()
4792 iwh_init(iwh_sc_t *sc) in iwh_init() argument
4800 iwh_release_calib_buffer(sc); in iwh_init()
4802 mutex_enter(&sc->sc_glock); in iwh_init()
4803 atomic_and_32(&sc->sc_flags, ~IWH_F_FW_INIT); in iwh_init()
4805 err = iwh_init_common(sc); in iwh_init()
4807 mutex_exit(&sc->sc_glock); in iwh_init()
4814 bcopy(sc->sc_dma_fw_data.mem_va, in iwh_init()
4815 sc->sc_dma_fw_data_bak.mem_va, in iwh_init()
4816 sc->sc_dma_fw_data.alength); in iwh_init()
4819 err = iwh_load_init_firmware(sc); in iwh_init()
4823 mutex_exit(&sc->sc_glock); in iwh_init()
4830 IWH_WRITE(sc, CSR_RESET, 0); in iwh_init()
4833 while (!(sc->sc_flags & IWH_F_FW_INIT)) { in iwh_init()
4834 if (cv_timedwait(&sc->sc_ucode_cv, in iwh_init()
4835 &sc->sc_glock, clk) < 0) { in iwh_init()
4840 if (!(sc->sc_flags & IWH_F_FW_INIT)) { in iwh_init()
4843 mutex_exit(&sc->sc_glock); in iwh_init()
4847 mutex_exit(&sc->sc_glock); in iwh_init()
4852 iwh_stop(sc); in iwh_init()
4854 mutex_enter(&sc->sc_glock); in iwh_init()
4855 atomic_and_32(&sc->sc_flags, ~IWH_F_FW_INIT); in iwh_init()
4857 err = iwh_init_common(sc); in iwh_init()
4859 mutex_exit(&sc->sc_glock); in iwh_init()
4866 err = iwh_load_run_firmware(sc); in iwh_init()
4870 mutex_exit(&sc->sc_glock); in iwh_init()
4877 IWH_WRITE(sc, CSR_RESET, 0); in iwh_init()
4880 while (!(sc->sc_flags & IWH_F_FW_INIT)) { in iwh_init()
4881 if (cv_timedwait(&sc->sc_ucode_cv, in iwh_init()
4882 &sc->sc_glock, clk) < 0) { in iwh_init()
4887 if (!(sc->sc_flags & IWH_F_FW_INIT)) { in iwh_init()
4890 mutex_exit(&sc->sc_glock); in iwh_init()
4894 mutex_exit(&sc->sc_glock); in iwh_init()
4898 mutex_enter(&sc->sc_glock); in iwh_init()
4899 atomic_and_32(&sc->sc_flags, ~IWH_F_FW_INIT); in iwh_init()
4905 err = iwh_config(sc); in iwh_init()
4909 mutex_exit(&sc->sc_glock); in iwh_init()
4916 mutex_exit(&sc->sc_glock); in iwh_init()
4924 iwh_stop(iwh_sc_t *sc) in iwh_stop() argument
4932 if (!(sc->sc_flags & IWH_F_QUIESCED)) { in iwh_stop()
4933 mutex_enter(&sc->sc_glock); in iwh_stop()
4936 IWH_WRITE(sc, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); in iwh_stop()
4940 IWH_WRITE(sc, CSR_INT_MASK, 0); in iwh_stop()
4941 IWH_WRITE(sc, CSR_INT, CSR_INI_SET_MASK); in iwh_stop()
4942 IWH_WRITE(sc, CSR_FH_INT_STATUS, 0xffffffff); in iwh_stop()
4948 iwh_reset_tx_ring(sc, &sc->sc_txq[i]); in iwh_stop()
4954 iwh_reset_rx_ring(sc); in iwh_stop()
4956 iwh_mac_access_enter(sc); in iwh_stop()
4957 iwh_reg_write(sc, ALM_APMG_CLK_DIS, APMG_CLK_REG_VAL_DMA_CLK_RQT); in iwh_stop()
4958 iwh_mac_access_exit(sc); in iwh_stop()
4962 iwh_stop_master(sc); in iwh_stop()
4964 mutex_enter(&sc->sc_mt_lock); in iwh_stop()
4965 sc->sc_tx_timer = 0; in iwh_stop()
4966 mutex_exit(&sc->sc_mt_lock); in iwh_stop()
4968 tmp = IWH_READ(sc, CSR_RESET); in iwh_stop()
4969 IWH_WRITE(sc, CSR_RESET, tmp | CSR_RESET_REG_FLAG_SW_RESET); in iwh_stop()
4974 if (!(sc->sc_flags & IWH_F_QUIESCED)) { in iwh_stop()
4975 mutex_exit(&sc->sc_glock); in iwh_stop()
5019 iwh_amrr_timeout(iwh_sc_t *sc) in iwh_amrr_timeout() argument
5021 ieee80211com_t *ic = &sc->sc_ic; in iwh_amrr_timeout()
5032 sc->sc_clk = ddi_get_lbolt(); in iwh_amrr_timeout()
5042 iwh_sc_t *sc = (iwh_sc_t *)ic; in iwh_is_max_rate() local
5048 if (sc->sc_ht_conf.tx_support_mcs[r/8] & in iwh_is_max_rate()
5067 iwh_sc_t *sc = (iwh_sc_t *)ic; in iwh_is_min_rate() local
5073 if (sc->sc_ht_conf.tx_support_mcs[r/8] & in iwh_is_min_rate()
5092 iwh_sc_t *sc = (iwh_sc_t *)ic; in iwh_increase_rate() local
5102 (sc->sc_ht_conf.tx_support_mcs[r/8] & in iwh_increase_rate()
5123 iwh_sc_t *sc = (iwh_sc_t *)ic; in iwh_decrease_rate() local
5133 (sc->sc_ht_conf.tx_support_mcs[r/8] & in iwh_decrease_rate()
5206 iwh_eep_addr_trans(iwh_sc_t *sc, uint32_t indi_addr) in iwh_eep_addr_trans() argument
5213 return (&sc->sc_eep_map[di_addr]); in iwh_eep_addr_trans()
5218 temp = IWH_READ_EEP_SHORT(sc, EEP_LINK_GENERAL); in iwh_eep_addr_trans()
5222 temp = IWH_READ_EEP_SHORT(sc, EEP_LINK_HOST); in iwh_eep_addr_trans()
5226 temp = IWH_READ_EEP_SHORT(sc, EEP_LINK_REGULATORY); in iwh_eep_addr_trans()
5230 temp = IWH_READ_EEP_SHORT(sc, EEP_LINK_CALIBRATION); in iwh_eep_addr_trans()
5234 temp = IWH_READ_EEP_SHORT(sc, EEP_LINK_PROCESS_ADJST); in iwh_eep_addr_trans()
5238 temp = IWH_READ_EEP_SHORT(sc, EEP_LINK_OTHERS); in iwh_eep_addr_trans()
5250 return (&sc->sc_eep_map[di_addr]); in iwh_eep_addr_trans()
5257 iwh_put_seg_fw(iwh_sc_t *sc, uint32_t addr_s, uint32_t addr_d, uint32_t len) in iwh_put_seg_fw() argument
5260 iwh_mac_access_enter(sc); in iwh_put_seg_fw()
5262 IWH_WRITE(sc, IWH_FH_TCSR_CHNL_TX_CONFIG_REG(IWH_FH_SRVC_CHNL), in iwh_put_seg_fw()
5265 IWH_WRITE(sc, IWH_FH_SRVC_CHNL_SRAM_ADDR_REG(IWH_FH_SRVC_CHNL), addr_d); in iwh_put_seg_fw()
5267 IWH_WRITE(sc, IWH_FH_TFDIB_CTRL0_REG(IWH_FH_SRVC_CHNL), in iwh_put_seg_fw()
5270 IWH_WRITE(sc, IWH_FH_TFDIB_CTRL1_REG(IWH_FH_SRVC_CHNL), len); in iwh_put_seg_fw()
5272 IWH_WRITE(sc, IWH_FH_TCSR_CHNL_TX_BUF_STS_REG(IWH_FH_SRVC_CHNL), in iwh_put_seg_fw()
5277 IWH_WRITE(sc, IWH_FH_TCSR_CHNL_TX_CONFIG_REG(IWH_FH_SRVC_CHNL), in iwh_put_seg_fw()
5282 iwh_mac_access_exit(sc); in iwh_put_seg_fw()
5291 iwh_alive_common(iwh_sc_t *sc) in iwh_alive_common() argument
5302 iwh_mac_access_enter(sc); in iwh_alive_common()
5307 sc->sc_scd_base = iwh_reg_read(sc, IWH_SCD_SRAM_BASE_ADDR); in iwh_alive_common()
5309 for (base = sc->sc_scd_base + IWH_SCD_CONTEXT_DATA_OFFSET; in iwh_alive_common()
5310 base < sc->sc_scd_base + IWH_SCD_TX_STTS_BITMAP_OFFSET; in iwh_alive_common()
5312 iwh_mem_write(sc, base, 0); in iwh_alive_common()
5315 for (; base < sc->sc_scd_base + IWH_SCD_TRANSLATE_TBL_OFFSET; in iwh_alive_common()
5317 iwh_mem_write(sc, base, 0); in iwh_alive_common()
5321 iwh_mem_write(sc, base + i, 0); in iwh_alive_common()
5324 iwh_reg_write(sc, IWH_SCD_DRAM_BASE_ADDR, in iwh_alive_common()
5325 sc->sc_dma_sh.cookie.dmac_address >> 10); in iwh_alive_common()
5327 iwh_reg_write(sc, IWH_SCD_QUEUECHAIN_SEL, in iwh_alive_common()
5330 iwh_reg_write(sc, IWH_SCD_AGGR_SEL, 0); in iwh_alive_common()
5333 iwh_reg_write(sc, IWH_SCD_QUEUE_RDPTR(i), 0); in iwh_alive_common()
5334 IWH_WRITE(sc, HBUS_TARG_WRPTR, 0 | (i << 8)); in iwh_alive_common()
5335 iwh_mem_write(sc, sc->sc_scd_base + in iwh_alive_common()
5337 iwh_mem_write(sc, sc->sc_scd_base + in iwh_alive_common()
5347 iwh_reg_write(sc, IWH_SCD_INTERRUPT_MASK, (1 << IWH_NUM_QUEUES) - 1); in iwh_alive_common()
5349 iwh_reg_write(sc, (IWH_SCD_BASE + 0x10), in iwh_alive_common()
5352 IWH_WRITE(sc, HBUS_TARG_WRPTR, (IWH_CMD_QUEUE_NUM << 8)); in iwh_alive_common()
5353 iwh_reg_write(sc, IWH_SCD_QUEUE_RDPTR(IWH_CMD_QUEUE_NUM), 0); in iwh_alive_common()
5360 iwh_reg_write(sc, IWH_SCD_QUEUE_STATUS_BITS(i), in iwh_alive_common()
5367 iwh_reg_write(sc, IWH_SCD_QUEUE_STATUS_BITS(IWH_CMD_QUEUE_NUM), in iwh_alive_common()
5374 iwh_reg_write(sc, IWH_SCD_QUEUE_STATUS_BITS(i), in iwh_alive_common()
5381 iwh_mac_access_exit(sc); in iwh_alive_common()
5385 rv = iwh_cmd(sc, COEX_PRIORITY_TABLE_CMD, &w_cmd, sizeof (w_cmd), 1); in iwh_alive_common()
5392 if ((sc->sc_dev_id != 0x423c) && in iwh_alive_common()
5393 (sc->sc_dev_id != 0x423d)) { in iwh_alive_common()
5397 c_cmd.data.cap_pin1 = LE_16(sc->sc_eep_calib->xtal_calib[0]); in iwh_alive_common()
5398 c_cmd.data.cap_pin2 = LE_16(sc->sc_eep_calib->xtal_calib[1]); in iwh_alive_common()
5400 rv = iwh_cmd(sc, REPLY_PHY_CALIBRATION_CMD, in iwh_alive_common()
5423 iwh_save_calib_result(iwh_sc_t *sc, iwh_rx_desc_t *desc) in iwh_save_calib_result() argument
5425 struct iwh_calib_results *res_p = &sc->sc_calib_results; in iwh_save_calib_result()
5522 iwh_tx_power_table(iwh_sc_t *sc, int async) in iwh_tx_power_table() argument
5530 txpower.channel = (uint8_t)LE_16(sc->sc_config.chan); in iwh_tx_power_table()
5552 err = iwh_cmd(sc, REPLY_TX_PWR_TABLE_CMD, &txpower, in iwh_tx_power_table()
5564 iwh_release_calib_buffer(iwh_sc_t *sc) in iwh_release_calib_buffer() argument
5566 if (sc->sc_calib_results.lo_res != NULL) { in iwh_release_calib_buffer()
5567 kmem_free(sc->sc_calib_results.lo_res, in iwh_release_calib_buffer()
5568 sc->sc_calib_results.lo_res_len); in iwh_release_calib_buffer()
5569 sc->sc_calib_results.lo_res = NULL; in iwh_release_calib_buffer()
5572 if (sc->sc_calib_results.tx_iq_res != NULL) { in iwh_release_calib_buffer()
5573 kmem_free(sc->sc_calib_results.tx_iq_res, in iwh_release_calib_buffer()
5574 sc->sc_calib_results.tx_iq_res_len); in iwh_release_calib_buffer()
5575 sc->sc_calib_results.tx_iq_res = NULL; in iwh_release_calib_buffer()
5578 if (sc->sc_calib_results.tx_iq_perd_res != NULL) { in iwh_release_calib_buffer()
5579 kmem_free(sc->sc_calib_results.tx_iq_perd_res, in iwh_release_calib_buffer()
5580 sc->sc_calib_results.tx_iq_perd_res_len); in iwh_release_calib_buffer()
5581 sc->sc_calib_results.tx_iq_perd_res = NULL; in iwh_release_calib_buffer()
5584 if (sc->sc_calib_results.dc_res != NULL) { in iwh_release_calib_buffer()
5585 kmem_free(sc->sc_calib_results.dc_res, in iwh_release_calib_buffer()
5586 sc->sc_calib_results.dc_res_len); in iwh_release_calib_buffer()
5587 sc->sc_calib_results.dc_res = NULL; in iwh_release_calib_buffer()
5590 if (sc->sc_calib_results.base_band_res != NULL) { in iwh_release_calib_buffer()
5591 kmem_free(sc->sc_calib_results.base_band_res, in iwh_release_calib_buffer()
5592 sc->sc_calib_results.base_band_res_len); in iwh_release_calib_buffer()
5593 sc->sc_calib_results.base_band_res = NULL; in iwh_release_calib_buffer()
5601 iwh_init_common(iwh_sc_t *sc) in iwh_init_common() argument
5606 if (iwh_reset_hw(sc) != IWH_SUCCESS) { in iwh_init_common()
5612 (void) iwh_preinit(sc); in iwh_init_common()
5614 tmp = IWH_READ(sc, CSR_GP_CNTRL); in iwh_init_common()
5624 iwh_mac_access_enter(sc); in iwh_init_common()
5625 IWH_WRITE(sc, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0); in iwh_init_common()
5627 IWH_WRITE(sc, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0); in iwh_init_common()
5628 IWH_WRITE(sc, FH_RSCSR_CHNL0_RBDCB_BASE_REG, in iwh_init_common()
5629 sc->sc_rxq.dma_desc.cookie.dmac_address >> 8); in iwh_init_common()
5631 IWH_WRITE(sc, FH_RSCSR_CHNL0_STTS_WPTR_REG, in iwh_init_common()
5632 ((uint32_t)(sc->sc_dma_sh.cookie.dmac_address + in iwh_init_common()
5635 IWH_WRITE(sc, FH_MEM_RCSR_CHNL0_CONFIG_REG, in iwh_init_common()
5641 iwh_mac_access_exit(sc); in iwh_init_common()
5642 IWH_WRITE(sc, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, in iwh_init_common()
5648 iwh_mac_access_enter(sc); in iwh_init_common()
5649 iwh_reg_write(sc, IWH_SCD_TXFACT, 0); in iwh_init_common()
5654 IWH_WRITE(sc, IWH_FH_KW_MEM_ADDR_REG, in iwh_init_common()
5655 sc->sc_dma_kw.cookie.dmac_address >> 4); in iwh_init_common()
5658 IWH_WRITE(sc, FH_MEM_CBBC_QUEUE(qid), in iwh_init_common()
5659 sc->sc_txq[qid].dma_desc.cookie.dmac_address >> 8); in iwh_init_common()
5660 IWH_WRITE(sc, IWH_FH_TCSR_CHNL_TX_CONFIG_REG(qid), in iwh_init_common()
5665 iwh_mac_access_exit(sc); in iwh_init_common()
5670 IWH_WRITE(sc, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); in iwh_init_common()
5671 IWH_WRITE(sc, CSR_UCODE_DRV_GP1_CLR, in iwh_init_common()
5677 IWH_WRITE(sc, CSR_INT, 0xffffffff); in iwh_init_common()
5682 IWH_WRITE(sc, CSR_INT_MASK, CSR_INI_SET_MASK); in iwh_init_common()
5684 IWH_WRITE(sc, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); in iwh_init_common()
5685 IWH_WRITE(sc, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); in iwh_init_common()
5691 iwh_fast_recover(iwh_sc_t *sc) in iwh_fast_recover() argument
5693 ieee80211com_t *ic = &sc->sc_ic; in iwh_fast_recover()
5696 mutex_enter(&sc->sc_glock); in iwh_fast_recover()
5701 bcopy(&sc->sc_config_save, &sc->sc_config, in iwh_fast_recover()
5702 sizeof (sc->sc_config)); in iwh_fast_recover()
5704 sc->sc_config.assoc_id = 0; in iwh_fast_recover()
5705 sc->sc_config.filter_flags &= ~LE_32(RXON_FILTER_ASSOC_MSK); in iwh_fast_recover()
5707 if ((err = iwh_hw_set_before_auth(sc)) != IWH_SUCCESS) { in iwh_fast_recover()
5710 mutex_exit(&sc->sc_glock); in iwh_fast_recover()
5714 bcopy(&sc->sc_config_save, &sc->sc_config, in iwh_fast_recover()
5715 sizeof (sc->sc_config)); in iwh_fast_recover()
5720 err = iwh_run_state_config(sc); in iwh_fast_recover()
5724 mutex_exit(&sc->sc_glock); in iwh_fast_recover()
5731 iwh_set_led(sc, 2, 0, 1); in iwh_fast_recover()
5733 mutex_exit(&sc->sc_glock); in iwh_fast_recover()
5735 atomic_and_32(&sc->sc_flags, ~IWH_F_HW_ERR_RECOVER); in iwh_fast_recover()
5748 iwh_run_state_config(iwh_sc_t *sc) in iwh_run_state_config() argument
5750 struct ieee80211com *ic = &sc->sc_ic; in iwh_run_state_config()
5758 sc->sc_config.assoc_id = in->in_associd & 0x3fff; in iwh_run_state_config()
5764 sc->sc_config.flags &= in iwh_run_state_config()
5769 sc->sc_config.flags |= in iwh_run_state_config()
5774 sc->sc_config.flags |= in iwh_run_state_config()
5785 ht_protec = sc->sc_ht_conf.ht_protection; in iwh_run_state_config()
5788 sc->sc_config.flags |= in iwh_run_state_config()
5795 iwh_config_rxon_chain(sc); in iwh_run_state_config()
5797 sc->sc_config.filter_flags |= in iwh_run_state_config()
5801 sc->sc_config.filter_flags |= in iwh_run_state_config()
5808 sc->sc_config.chan, sc->sc_config.flags, in iwh_run_state_config()
5809 sc->sc_config.filter_flags)); in iwh_run_state_config()
5811 err = iwh_cmd(sc, REPLY_RXON, &sc->sc_config, in iwh_run_state_config()
5819 if ((sc->sc_dev_id != 0x423c) && in iwh_run_state_config()
5820 (sc->sc_dev_id != 0x423d)) { in iwh_run_state_config()
5824 err = iwh_tx_power_table(sc, 1); in iwh_run_state_config()
5833 err = iwh_qosparam_to_hw(sc, 1); in iwh_run_state_config()
5927 iwh_qosparam_to_hw(iwh_sc_t *sc, int async) in iwh_qosparam_to_hw() argument
5929 ieee80211com_t *ic = &sc->sc_ic; in iwh_qosparam_to_hw()
5975 err = iwh_cmd(sc, REPLY_QOS_PARAM, &qosparam_cmd, in iwh_qosparam_to_hw()
6071 iwh_init_ht_conf(iwh_sc_t *sc) in iwh_init_ht_conf() argument
6073 (void) memset(&sc->sc_ht_conf, 0, sizeof (iwh_ht_conf_t)); in iwh_init_ht_conf()
6075 if ((0x4235 == sc->sc_dev_id) || in iwh_init_ht_conf()
6076 (0x4236 == sc->sc_dev_id) || in iwh_init_ht_conf()
6077 (0x423a == sc->sc_dev_id)) { in iwh_init_ht_conf()
6078 sc->sc_ht_conf.ht_support = 1; in iwh_init_ht_conf()
6080 sc->sc_ht_conf.valid_chains = 3; in iwh_init_ht_conf()
6081 sc->sc_ht_conf.tx_stream_count = 2; in iwh_init_ht_conf()
6082 sc->sc_ht_conf.rx_stream_count = 2; in iwh_init_ht_conf()
6084 sc->sc_ht_conf.tx_support_mcs[0] = 0xff; in iwh_init_ht_conf()
6085 sc->sc_ht_conf.tx_support_mcs[1] = 0xff; in iwh_init_ht_conf()
6086 sc->sc_ht_conf.rx_support_mcs[0] = 0xff; in iwh_init_ht_conf()
6087 sc->sc_ht_conf.rx_support_mcs[1] = 0xff; in iwh_init_ht_conf()
6089 sc->sc_ht_conf.ht_support = 1; in iwh_init_ht_conf()
6091 sc->sc_ht_conf.valid_chains = 2; in iwh_init_ht_conf()
6092 sc->sc_ht_conf.tx_stream_count = 1; in iwh_init_ht_conf()
6093 sc->sc_ht_conf.rx_stream_count = 2; in iwh_init_ht_conf()
6095 sc->sc_ht_conf.tx_support_mcs[0] = 0xff; in iwh_init_ht_conf()
6096 sc->sc_ht_conf.rx_support_mcs[0] = 0xff; in iwh_init_ht_conf()
6097 sc->sc_ht_conf.rx_support_mcs[1] = 0xff; in iwh_init_ht_conf()
6100 if (sc->sc_ht_conf.ht_support) { in iwh_init_ht_conf()
6101 sc->sc_ht_conf.cap |= HT_CAP_GRN_FLD; in iwh_init_ht_conf()
6102 sc->sc_ht_conf.cap |= HT_CAP_SGI_20; in iwh_init_ht_conf()
6103 sc->sc_ht_conf.cap |= HT_CAP_MAX_AMSDU; in iwh_init_ht_conf()
6105 sc->sc_ht_conf.cap |= HT_CAP_MIMO_PS; in iwh_init_ht_conf()
6107 sc->sc_ht_conf.ampdu_p.factor = HT_RX_AMPDU_FACTOR; in iwh_init_ht_conf()
6108 sc->sc_ht_conf.ampdu_p.density = HT_MPDU_DENSITY; in iwh_init_ht_conf()
6110 sc->sc_ht_conf.ht_protection = HT_PROT_CHAN_NON_HT; in iwh_init_ht_conf()
6118 iwh_overwrite_11n_rateset(iwh_sc_t *sc) in iwh_overwrite_11n_rateset() argument
6120 uint8_t *ht_rs = sc->sc_ht_conf.rx_support_mcs; in iwh_overwrite_11n_rateset()
6157 iwh_overwrite_ic_default(iwh_sc_t *sc) in iwh_overwrite_ic_default() argument
6159 ieee80211com_t *ic = &sc->sc_ic; in iwh_overwrite_ic_default()
6161 sc->sc_newstate = ic->ic_newstate; in iwh_overwrite_ic_default()
6166 if (sc->sc_ht_conf.ht_support) { in iwh_overwrite_ic_default()
6167 sc->sc_recv_action = ic->ic_recv_action; in iwh_overwrite_ic_default()
6169 sc->sc_send_action = ic->ic_send_action; in iwh_overwrite_ic_default()
6172 ic->ic_ampdu_rxmax = sc->sc_ht_conf.ampdu_p.factor; in iwh_overwrite_ic_default()
6173 ic->ic_ampdu_density = sc->sc_ht_conf.ampdu_p.density; in iwh_overwrite_ic_default()
6183 iwh_config_rxon_chain(iwh_sc_t *sc) in iwh_config_rxon_chain() argument
6185 ieee80211com_t *ic = &sc->sc_ic; in iwh_config_rxon_chain()
6188 if (3 == sc->sc_ht_conf.valid_chains) { in iwh_config_rxon_chain()
6189 sc->sc_config.rx_chain = LE_16((RXON_RX_CHAIN_A_MSK | in iwh_config_rxon_chain()
6193 sc->sc_config.rx_chain |= LE_16((RXON_RX_CHAIN_A_MSK | in iwh_config_rxon_chain()
6197 sc->sc_config.rx_chain |= LE_16((RXON_RX_CHAIN_A_MSK | in iwh_config_rxon_chain()
6201 sc->sc_config.rx_chain = LE_16((RXON_RX_CHAIN_A_MSK | in iwh_config_rxon_chain()
6204 sc->sc_config.rx_chain |= LE_16((RXON_RX_CHAIN_A_MSK | in iwh_config_rxon_chain()
6207 sc->sc_config.rx_chain |= LE_16((RXON_RX_CHAIN_A_MSK | in iwh_config_rxon_chain()
6212 sc->sc_config.rx_chain |= LE_16(RXON_RX_CHAIN_DRIVER_FORCE_MSK); in iwh_config_rxon_chain()
6216 sc->sc_ht_conf.ht_support) { in iwh_config_rxon_chain()
6217 if (3 == sc->sc_ht_conf.valid_chains) { in iwh_config_rxon_chain()
6218 sc->sc_config.rx_chain |= LE_16(3 << in iwh_config_rxon_chain()
6220 sc->sc_config.rx_chain |= LE_16(3 << in iwh_config_rxon_chain()
6223 sc->sc_config.rx_chain |= LE_16(2 << in iwh_config_rxon_chain()
6225 sc->sc_config.rx_chain |= LE_16(2 << in iwh_config_rxon_chain()
6229 sc->sc_config.rx_chain |= LE_16(1 << in iwh_config_rxon_chain()
6234 "rxon->rx_chain = %x\n", sc->sc_config.rx_chain)); in iwh_config_rxon_chain()
6241 iwh_add_ap_sta(iwh_sc_t *sc) in iwh_add_ap_sta() argument
6243 ieee80211com_t *ic = &sc->sc_ic; in iwh_add_ap_sta()
6257 if (sc->sc_ht_conf.ht_support && in iwh_add_ap_sta()
6282 err = iwh_cmd(sc, REPLY_ADD_STA, &node, sizeof (node), 1); in iwh_add_ap_sta()
6300 iwh_ap_lq(iwh_sc_t *sc) in iwh_ap_lq() argument
6302 ieee80211com_t *ic = &sc->sc_ic; in iwh_ap_lq()
6341 err = iwh_cmd(sc, REPLY_TX_LINK_QUALITY_CMD, &link_quality, in iwh_ap_lq()
6375 iwh_sc_t *sc; in iwh_recv_action() local
6391 sc = (iwh_sc_t *)ic; in iwh_recv_action()
6393 sc->sc_recv_action(in, frm, efrm); in iwh_recv_action()
6418 mutex_enter(&sc->sc_glock); in iwh_recv_action()
6419 err = iwh_cmd(sc, REPLY_ADD_STA, &node, sizeof (node), 1); in iwh_recv_action()
6423 mutex_exit(&sc->sc_glock); in iwh_recv_action()
6426 mutex_exit(&sc->sc_glock); in iwh_recv_action()
6452 mutex_enter(&sc->sc_glock); in iwh_recv_action()
6453 err = iwh_cmd(sc, REPLY_ADD_STA, &node, sizeof (node), 1); in iwh_recv_action()
6457 mutex_exit(&sc->sc_glock); in iwh_recv_action()
6460 mutex_exit(&sc->sc_glock); in iwh_recv_action()
6480 iwh_sc_t *sc; in iwh_send_action() local
6496 sc = (iwh_sc_t *)ic; in iwh_send_action()
6498 ret = sc->sc_send_action(in, category, action, args); in iwh_send_action()
6521 mutex_enter(&sc->sc_glock); in iwh_send_action()
6522 err = iwh_cmd(sc, REPLY_ADD_STA, &node, sizeof (node), 1); in iwh_send_action()
6526 mutex_exit(&sc->sc_glock); in iwh_send_action()
6529 mutex_exit(&sc->sc_glock); in iwh_send_action()
6542 iwh_reset_hw(iwh_sc_t *sc) in iwh_reset_hw() argument
6547 tmp = IWH_READ(sc, CSR_HW_IF_CONFIG_REG); in iwh_reset_hw()
6548 IWH_WRITE(sc, CSR_HW_IF_CONFIG_REG, in iwh_reset_hw()
6555 if (IWH_READ(sc, CSR_HW_IF_CONFIG_REG) & in iwh_reset_hw()
6566 tmp = IWH_READ(sc, CSR_HW_IF_CONFIG_REG); in iwh_reset_hw()
6567 IWH_WRITE(sc, CSR_HW_IF_CONFIG_REG, in iwh_reset_hw()
6571 if (0 == (IWH_READ(sc, CSR_HW_IF_CONFIG_REG) & in iwh_reset_hw()
6582 tmp = IWH_READ(sc, CSR_HW_IF_CONFIG_REG); in iwh_reset_hw()
6583 IWH_WRITE(sc, CSR_HW_IF_CONFIG_REG, in iwh_reset_hw()
6590 if (IWH_READ(sc, CSR_HW_IF_CONFIG_REG) & in iwh_reset_hw()