291     outl(ChipReset, ioaddr + ChipCmd);  in natsemi_probe()
313     outl(SavedClkRun & ~0x100, ioaddr + ClkRun);  in natsemi_probe()
356     outl(EE_Write0, ee_addr);  in eeprom_read()
361 	outl(dataval, ee_addr);  in eeprom_read()
363 	outl(dataval | EE_ShiftClk, ee_addr);  in eeprom_read()
366     outl(EE_ChipSelect, ee_addr);  in eeprom_read()
370 	outl(EE_ChipSelect | EE_ShiftClk, ee_addr);  in eeprom_read()
373 	outl(EE_ChipSelect, ee_addr);  in eeprom_read()
378     outl(EE_Write0, ee_addr);  in eeprom_read()
379     outl(0, ee_addr);  in eeprom_read()
417     outl(SavedClkRun & ~0x100, ioaddr + ClkRun);  in natsemi_init()
434     outl(tx_config, ioaddr + TxConfig);  in natsemi_init()
435     outl(rx_config, ioaddr + RxConfig);  in natsemi_init()
440     outl(RxOn, ioaddr + ChipCmd);  in natsemi_init()
455     outl(ChipReset, ioaddr + ChipCmd);  in natsemi_reset()
470     outl(0, ioaddr + IntrMask);  in natsemi_reset()
471     outl(0, ioaddr + IntrEnable);  in natsemi_reset()
489 	outl(i, ioaddr + RxFilterAddr);  in natsemi_init_rxfilter()
512     outl(virt_to_bus(&txd), ioaddr + TxRingPtr);   in natsemi_init_txd()
545     outl(virt_to_bus(&rxd[0]), ioaddr + RxRingPtr);  in natsemi_init_rxd()
568     outl(rx_mode, ioaddr + RxFilterAddr);  in natsemi_set_rx_mode()
586     outl(tx_config, ioaddr + TxConfig);  in natsemi_check_duplex()
587     outl(rx_config, ioaddr + RxConfig);  in natsemi_check_duplex()
613     outl(TxOff, ioaddr + ChipCmd);  in natsemi_transmit()
616     outl(virt_to_bus(&txd), ioaddr + TxRingPtr);  in natsemi_transmit()
642     outl(TxOn, ioaddr + ChipCmd);  in natsemi_transmit()
714     outl(RxOn, ioaddr + ChipCmd);  in natsemi_poll()
736     outl(0, ioaddr + IntrMask);  in natsemi_disable()
737     outl(0, ioaddr + IntrEnable);  in natsemi_disable()
740     outl(RxOff | TxOff, ioaddr + ChipCmd);  in natsemi_disable()
743     outl(SavedClkRun, ioaddr + ClkRun);  in natsemi_disable()