114 static int cnex_intr_new_cpu(cnex_soft_state_t *ssp, cnex_intr_t *iinfo);
115 static int cnex_intr_dis_wait(cnex_soft_state_t *ssp, cnex_intr_t *iinfo);
361 cnex_intr_new_cpu(cnex_soft_state_t *ssp, cnex_intr_t *iinfo)  in cnex_intr_new_cpu()  argument
367 	rv = hvldc_intr_getvalid(ssp->cfghdl, iinfo->ino, &intr_state);  in cnex_intr_new_cpu()
370 		    iinfo->ino);  in cnex_intr_new_cpu()
376 		rv = cnex_intr_dis_wait(ssp, iinfo);  in cnex_intr_new_cpu()
383 	iinfo->cpuid = intr_dist_cpuid();  in cnex_intr_new_cpu()
384 	(void) hvldc_intr_settarget(ssp->cfghdl, iinfo->ino, iinfo->cpuid);  in cnex_intr_new_cpu()
385 	intr_dist_cpuid_add_device_weight(iinfo->cpuid, iinfo->dip,  in cnex_intr_new_cpu()
386 	    iinfo->weight);  in cnex_intr_new_cpu()
390 		(void) hvldc_intr_setvalid(ssp->cfghdl, iinfo->ino,  in cnex_intr_new_cpu()
402 cnex_intr_dis_wait(cnex_soft_state_t *ssp, cnex_intr_t *iinfo)  in cnex_intr_dis_wait()  argument
407 	rv = hvldc_intr_setvalid(ssp->cfghdl, iinfo->ino, HV_INTR_NOTVALID);  in cnex_intr_dis_wait()
410 		    iinfo->ino);  in cnex_intr_dis_wait()
421 		rv = hvldc_intr_getstate(ssp->cfghdl, iinfo->ino, &intr_state);  in cnex_intr_dis_wait()
424 			    "state\n", iinfo->ino);  in cnex_intr_dis_wait()
613 	cnex_intr_t	*iinfo;  in cnex_add_intr()  local
641 		iinfo = &(cldcp->tx);  in cnex_add_intr()
643 		iinfo = &(cldcp->rx);  in cnex_add_intr()
651 	if (iinfo->hdlr != 0) {  in cnex_add_intr()
658 	iinfo->hdlr = hdlr;  in cnex_add_intr()
659 	iinfo->arg1 = arg1;  in cnex_add_intr()
660 	iinfo->arg2 = arg2;  in cnex_add_intr()
663 	iinfo->dip = cldcp->dip;  in cnex_add_intr()
664 	iinfo->id = cldcp->id;  in cnex_add_intr()
666 	iinfo->icookie = MINVINTR_COOKIE + iinfo->ino;  in cnex_add_intr()
673 	if (iinfo->icookie >= MAXIVNUM || iinfo->icookie < MINVINTR_COOKIE) {  in cnex_add_intr()
675 		    iinfo->icookie, iinfo->ino);  in cnex_add_intr()
681 	    "cookie=0x%llx\n", cnex_ssp->cfghdl, iinfo->ino, iinfo->icookie);  in cnex_add_intr()
692 	if (add_ivintr(iinfo->icookie, pil, (intrfunc)cnex_intr_wrapper,  in cnex_add_intr()
693 	    (caddr_t)iinfo, NULL, NULL) != 0) {  in cnex_add_intr()
695 		    iinfo->icookie, iinfo->ino);  in cnex_add_intr()
701 	rv = hvldc_intr_setcookie(cnex_ssp->cfghdl, iinfo->ino, iinfo->icookie);  in cnex_add_intr()
704 	iinfo->cpuid = intr_dist_cpuid();  in cnex_add_intr()
707 	rv = hvldc_intr_settarget(cnex_ssp->cfghdl, iinfo->ino, iinfo->cpuid);  in cnex_add_intr()
710 		    iinfo->ino);  in cnex_add_intr()
713 	rv = hvldc_intr_setstate(cnex_ssp->cfghdl, iinfo->ino,  in cnex_add_intr()
717 		    iinfo->ino);  in cnex_add_intr()
720 	rv = hvldc_intr_setvalid(cnex_ssp->cfghdl, iinfo->ino, HV_INTR_VALID);  in cnex_add_intr()
723 		    iinfo->ino);  in cnex_add_intr()
727 	intr_dist_cpuid_add_device_weight(iinfo->cpuid, iinfo->dip,  in cnex_add_intr()
728 	    iinfo->weight);  in cnex_add_intr()
734 	(void) rem_ivintr(iinfo->icookie, pil);  in cnex_add_intr()
802 	cnex_intr_t		*iinfo;  in cnex_rem_intr()  local
830 		iinfo = &(cldcp->tx);  in cnex_rem_intr()
832 		iinfo = &(cldcp->rx);  in cnex_rem_intr()
839 	D1("cnex_rem_intr: interrupt ino=0x%x\n", iinfo->ino);  in cnex_rem_intr()
842 	if (iinfo->hdlr == 0) {  in cnex_rem_intr()
848 	D1("cnex_rem_intr: set intr to invalid ino=0x%x\n", iinfo->ino);  in cnex_rem_intr()
850 	    iinfo->ino, HV_INTR_NOTVALID);  in cnex_rem_intr()
852 		DWARN("cnex_rem_intr: cannot set valid ino=%x\n", iinfo->ino);  in cnex_rem_intr()
861 	rv = hvldc_intr_getstate(cnex_ssp->cfghdl, iinfo->ino, &istate);  in cnex_rem_intr()
864 		    iinfo->ino);  in cnex_rem_intr()
872 		    iinfo->ino);  in cnex_rem_intr()
885 	intr_dist_cpuid_rem_device_weight(iinfo->cpuid, iinfo->dip);  in cnex_rem_intr()
888 	(void) rem_ivintr(iinfo->icookie, pil);  in cnex_rem_intr()
891 	bzero(iinfo, sizeof (*iinfo));  in cnex_rem_intr()
907 	cnex_intr_t		*iinfo;  in cnex_clr_intr()  local
934 		iinfo = &(cldcp->tx);  in cnex_clr_intr()
936 		iinfo = &(cldcp->rx);  in cnex_clr_intr()
943 	D1("%s: interrupt ino=0x%x\n", __func__, iinfo->ino);  in cnex_clr_intr()
946 	if (iinfo->hdlr == 0) {  in cnex_clr_intr()
952 	rv = hvldc_intr_setstate(cnex_ssp->cfghdl, iinfo->ino,  in cnex_clr_intr()
975 	cnex_intr_t 		*iinfo = (cnex_intr_t *)arg;  in cnex_intr_wrapper()  local
977 	ASSERT(iinfo != NULL);  in cnex_intr_wrapper()
979 	handler = iinfo->hdlr;  in cnex_intr_wrapper()
980 	handler_arg1 = iinfo->arg1;  in cnex_intr_wrapper()
981 	handler_arg2 = iinfo->arg2;  in cnex_intr_wrapper()
992 	DTRACE_PROBE4(channelintr__start, uint64_t, iinfo->id,  in cnex_intr_wrapper()
993 	    cnex_intr_t *, iinfo, void *, handler, caddr_t, handler_arg1);  in cnex_intr_wrapper()
995 	DTRACE_PROBE4(interrupt__start, dev_info_t, iinfo->dip,  in cnex_intr_wrapper()
998 	D1("cnex_intr_wrapper:ino=0x%llx invoke client handler\n", iinfo->ino);  in cnex_intr_wrapper()
1001 	DTRACE_PROBE4(interrupt__complete, dev_info_t, iinfo->dip,  in cnex_intr_wrapper()
1004 	DTRACE_PROBE4(channelintr__complete, uint64_t, iinfo->id,  in cnex_intr_wrapper()
1005 	    cnex_intr_t *, iinfo, void *, handler, caddr_t, handler_arg1);  in cnex_intr_wrapper()