Lines Matching refs:scr3
78 #define GET_DCACHE_DTAG(afar, datap, scr1, scr2, scr3) \ argument
79 set CH_DCACHE_IDX_MASK, scr3; \
80 and afar, scr3, scr3; \
86 ldxa [scr3]ASI_DC_TAG, scr1; /* read tag */ \
90 stxa scr3, [datap + CH_DC_IDX]%asi; /* store index */ \
93 ldxa [scr3]ASI_DC_UTAG, scr1; /* read utag */ \
96 ldxa [scr3]ASI_DC_SNP_TAG, scr1; /* read snoop tag */ \
102 ldxa [scr3 + scr2]ASI_DC_DATA, scr1; /* read data */ \
118 or scr3, scr1, scr3; /* add DC_data_parity bit to index */ \
121 ldxa [scr3 + scr2]ASI_DC_DATA, scr1; /* read parity bits */ \
132 add scr3, scr1, scr3; \
134 cmp scr3, scr1; \
158 #define GET_ICACHE_DTAG(afar, datap, scr1, scr2, scr3) \ argument
167 set CH_ICACHE_IDX_MASK, scr3; \
171 set PN_ICACHE_VA_IDX_MASK, scr3; \
173 and afar, scr3, scr3; \
174 sllx scr3, CH_ICACHE_IDX_SHIFT, scr3; \
181 ldxa [scr3]ASI_IC_TAG, scr1; /* read pa tag */ \
186 stxa scr3, [datap + CH_IC_IDX]%asi; /* store index */ \
188 add scr3, CH_ICTAG_UTAG, scr3; /* read utag */ \
189 ldxa [scr3]ASI_IC_TAG, scr1; \
190 add scr3, (CH_ICTAG_UPPER - CH_ICTAG_UTAG), scr3; \
192 ldxa [scr3]ASI_IC_TAG, scr1; /* read upper tag */ \
193 add scr3, (CH_ICTAG_LOWER - CH_ICTAG_UPPER), scr3; \
195 ldxa [scr3]ASI_IC_TAG, scr1; /* read lower tag */ \
196 andn scr3, CH_ICTAG_TMASK, scr3; \
198 ldxa [scr3]ASI_IC_SNP_TAG, scr1; /* read snoop tag */ \
203 ldxa [scr3 + scr2]ASI_IC_DATA, scr1; /* read ins. data */ \
213 add scr3, scr1, scr3; \
215 cmp scr3, scr1; \
232 #define GET_ECACHE_DTAG(afar, datap, ec_way, scr1, scr2, scr3) \ argument
237 and afar, scr2, scr3; /* get set offset */ \
238 andn scr3, (JP_ECACHE_MAX_LSIZE - 1), scr3; /* VA<5:0>=0 */ \
239 or scr3, scr1, scr3; /* or WAY bits */ \
241 stxa scr3, [datap + CH_EC_IDX]%asi; /* store E$ index */ \
245 ldxa [scr3]ASI_EC_DIAG, scr1; /* get E$ tag */ \
250 ldxa [scr3]ASI_EC_R, %g0; /* ld E$ stging regs */ \
259 btst CH_ECACHE_STGREG_SIZE, scr3; /* done? */ \
261 add scr3, CH_ECACHE_STGREG_SIZE, scr3
263 #define GET_ECACHE_DTAGS(afar, datap, scr1, scr2, scr3) \ argument
264 GET_ECACHE_DTAG(afar, datap, 0, scr1, scr2, scr3); \
265 GET_ECACHE_DTAG(afar, datap, 1, scr1, scr2, scr3); \
266 GET_ECACHE_DTAG(afar, datap, 2, scr1, scr2, scr3); \
267 GET_ECACHE_DTAG(afar, datap, 3, scr1, scr2, scr3); \
300 #define GET_SHADOW_DATA(afar, datap, scr1, scr2, scr3) argument
334 #define GET_SHADOW_DATA(afar, datap, scr1, scr2, scr3) \
337 GET_ECACHE_DTAGS(afar, datap, scr1, scr2, scr3); \
338 GET_DCACHE_DTAG(afar, datap, scr1, scr2, scr3); \
339 GET_ICACHE_DTAG(afar, datap, scr1, scr2, scr3); \
355 #define GET_ECACHE_DTAG(afar, datap, pn_way, scr1, scr2, scr3) \
356 mov afar, scr3; \
357 andn scr3, (CH_ECACHE_SUBBLK_SIZE - 1), scr3; /* VA<5:0>=0 */\
359 and scr3, scr2, scr3; /* VA<63:23>=0 */ \
362 or scr3, scr1, scr3; /* in the way bits <24:23>. */ \
364 stxa scr3, [datap + CH_EC_IDX]%asi; /* store E$ index */ \
367 ldxa [scr3]ASI_EC_DIAG, scr1; /* get E$ tag */ \
370 or scr3, scr1, scr1; \
375 ldxa [scr3]ASI_EC_R, %g0; /* ld E$ stging regs */ \
384 btst CH_ECACHE_STGREG_SIZE, scr3; /* done? */ \
386 add scr3, CH_ECACHE_STGREG_SIZE, scr3
507 #define GET_PN_L2_CACHE_DTAGS(afar, datap, scr1, scr2, scr3) \
508 mov afar, scr3; \
510 and scr3, scr1, scr3; \
515 stxa scr3, [datap + CH_EC_IDX]%asi; /* store L2$ index */ \
516 ldxa [scr3]ASI_L2_TAG, scr1; /* read the L2$ tag */ \
521 ldxa [scr3 + scr1]ASI_L2_DATA, scr2; /* loop through */ \
528 ldxa [scr3 + scr2]ASI_L2_DATA, scr2; /* Read and record */ \
532 ldxa [scr3 + scr1]ASI_L2_DATA, scr2; /* loop through */ \
540 ldxa [scr3 + scr2]ASI_L2_DATA, scr2; /* Read and record */ \
545 cmp scr1, scr3; /* more ways to try for this line? */ \
547 add scr3, scr2, scr3
557 #define GET_ECACHE_DTAGS(afar, datap, scr1, scr2, scr3) \
562 GET_ECACHE_DTAG(afar, datap, 0, scr1, scr2, scr3); \
563 GET_ECACHE_DTAG(afar, datap, 1, scr1, scr2, scr3); \
564 GET_ECACHE_DTAG(afar, datap, 2, scr1, scr2, scr3); \
565 GET_ECACHE_DTAG(afar, datap, 3, scr1, scr2, scr3); \
567 GET_PN_L2_CACHE_DTAGS(afar, datap, scr1, scr2, scr3); \
571 GET_ECACHE_DTAG(afar, datap, 0, scr1, scr2, scr3); \
574 GET_ECACHE_DTAG(afar, datap, 0, scr1, scr2, scr3); \
590 #define GET_SHADOW_DATA(afar, datap, scr1, scr2, scr3) \
593 GET_ECACHE_DTAGS(afar, datap, scr1, scr2, scr3); \
594 GET_DCACHE_DTAG(afar, datap, scr1, scr2, scr3); \
595 GET_ICACHE_DTAG(afar, datap, scr1, scr2, scr3); \
619 #define GET_ECACHE_DTAG(afar, datap, scr1, scr2, scr3) \
620 mov afar, scr3; \
621 andn scr3, (CH_ECACHE_SUBBLK_SIZE - 1), scr3; /* VA<5:0>=0 */\
623 and scr3, scr2, scr3; /* VA<63:23>=0 */ \
625 stxa scr3, [datap + CH_EC_IDX]%asi; /* store E$ index */ \
628 ldxa [scr3]ASI_EC_DIAG, scr1; /* get E$ tag */ \
632 ldxa [scr3]ASI_EC_R, %g0; /* ld E$ stging regs */ \
641 btst CH_ECACHE_STGREG_SIZE, scr3; /* done? */ \
643 add scr3, CH_ECACHE_STGREG_SIZE, scr3
678 #define GET_ECACHE_DTAGS(afar, datap, scr1, scr2, scr3) \
679 GET_ECACHE_DTAG(afar, datap, scr1, scr2, scr3); \
686 #define GET_SHADOW_DATA(afar, datap, scr1, scr2, scr3)
724 #define DO_TL1_CPU_LOGOUT(r_val, afar, t_flags, datap, scr1, scr2, scr3) \ argument
733 GET_ECACHE_DTAGS(afar, datap, scr1, scr2, scr3); \
734 GET_DCACHE_DTAG(afar, datap, scr1, scr2, scr3); \
735 GET_ICACHE_DTAG(afar, datap, scr1, scr2, scr3); \
737 GET_SHADOW_DATA(afar, datap, scr1, scr2, scr3); \
782 #define DO_CPU_LOGOUT(r_val, afar, r_or_s, t_flags, scr1, scr2, scr3, scr4) \ argument
783 GET_CPU_PRIVATE_PTR(r_or_s, scr1, scr3, 7f); /* can't use scr2/4 */ \
785 DO_TL1_CPU_LOGOUT(r_val, afar, t_flags, scr1, scr2, scr3, scr4) \
979 #define PN_L2_FLUSHALL(scr1, scr2, scr3) \ argument
980 GET_CPU_IMPL(scr3); \
981 cmp scr3, PANTHER_IMPL; \
986 set PN_L2_IDX_DISP_FLUSH, scr3; \
990 ldxa [scr1 + scr3]ASI_L2_TAG, %g0; \
993 #define PN_L2_FLUSHALL(scr1, scr2, scr3)