Lines Matching refs:ea
622 uint64_t ea, tea, g, r; in vis_alignaddr() local
629 ftt = read_iureg(pfpsd, nrs1, pregs, prw, &ea); in vis_alignaddr()
635 ea += tea; in vis_alignaddr()
636 r = ea & ~0x7; /* zero least 3 significant bits */ in vis_alignaddr()
642 r = ea & 0x7; in vis_alignaddr()
669 uint64_t ea, tea, g; in vis_bmask() local
676 ftt = read_iureg(pfpsd, nrs1, pregs, prw, &ea); in vis_bmask()
682 ea += tea; in vis_bmask()
683 ftt = write_iureg(pfpsd, nrd, pregs, prw, &ea); in vis_bmask()
689 g |= (ea << GSR_MASK_SHIFT) & GSR_MASK_MASK; in vis_bmask()
1440 uint64_t ea, tmsk; in vis_prtl_fst() local
1458 ftt = read_iureg(pfpsd, nrs1, pregs, prw, &ea); in vis_prtl_fst()
1470 pfpsd->fp_trapaddr = (caddr_t)ea; /* setup bad addr in case we trap */ in vis_prtl_fst()
1471 if ((ea & 0x3) != 0) in vis_prtl_fst()
1477 ftt = _fp_read_extword((uint64_t *)ea, &l.ll, pfpsd); in vis_prtl_fst()
1487 ftt = _fp_write_extword((uint64_t *)ea, res.ll, pfpsd); in vis_prtl_fst()
1493 ftt = _fp_read_extword((uint64_t *)ea, &l.ll, pfpsd); in vis_prtl_fst()
1503 ftt = _fp_write_extword((uint64_t *)ea, res.ll, pfpsd); in vis_prtl_fst()
1509 ftt = _fp_read_extword((uint64_t *)ea, &l.ll, pfpsd); in vis_prtl_fst()
1519 ftt = _fp_write_extword((uint64_t *)ea, res.ll, pfpsd); in vis_prtl_fst()
1525 ftt = _fp_read_extword((uint64_t *)ea, &l.ll, pfpsd); in vis_prtl_fst()
1538 ftt = _fp_write_extword((uint64_t *)ea, res.ll, pfpsd); in vis_prtl_fst()
1544 ftt = _fp_read_extword((uint64_t *)ea, &l.ll, pfpsd); in vis_prtl_fst()
1554 ftt = _fp_write_extword((uint64_t *)ea, res.ll, pfpsd); in vis_prtl_fst()
1560 ftt = _fp_read_extword((uint64_t *)ea, &l.ll, pfpsd); in vis_prtl_fst()
1577 ftt = _fp_write_extword((uint64_t *)ea, res.ll, pfpsd); in vis_prtl_fst()
1601 uint64_t ea, tea; in vis_short_fls() local
1625 ftt = read_iureg(pfpsd, nrs1, pregs, prw, &ea); in vis_short_fls()
1631 ea += tea; in vis_short_fls()
1634 ea = (fp.i << 19) >> 19; /* Extract simm13 field. */ in vis_short_fls()
1638 ea += tea; in vis_short_fls()
1641 ea = (uint64_t)(caddr32_t)ea; in vis_short_fls()
1643 pfpsd->fp_trapaddr = (caddr_t)ea; /* setup bad addr in case we trap */ in vis_short_fls()
1650 if (fuword8((void *)ea, &uc) == -1) in vis_short_fls()
1658 if (subyte((caddr_t)ea, uc) == -1) in vis_short_fls()
1664 if ((ea & 1) == 1) in vis_short_fls()
1667 if (fuword16((void *)ea, &us) == -1) in vis_short_fls()
1675 if (suword16((caddr_t)ea, us) == -1) in vis_short_fls()
1681 if ((ea & 1) == 1) in vis_short_fls()
1684 if (fuword16((void *)ea, &us) == -1) in vis_short_fls()
1694 if (suword16((void *)ea, us) == -1) in vis_short_fls()
1720 uint64_t ea, tea; in vis_blk_fldst() local
1745 ftt = read_iureg(pfpsd, nrs1, pregs, prw, &ea); in vis_blk_fldst()
1751 ea += tea; in vis_blk_fldst()
1754 ea = (fp.i << 19) >> 19; /* Extract simm13 field. */ in vis_blk_fldst()
1758 ea += tea; in vis_blk_fldst()
1760 if ((ea & 0x3F) != 0) /* Require 64 byte-alignment. */ in vis_blk_fldst()
1763 pfpsd->fp_trapaddr = (caddr_t)ea; /* setup bad addr in case we trap */ in vis_blk_fldst()
1779 ftt = _fp_read_extword((uint64_t *)ea, &k.ll, in vis_blk_fldst()
1790 ea += 8; in vis_blk_fldst()
1801 ftt = _fp_write_extword((uint64_t *)ea, k.ll, in vis_blk_fldst()
1805 ea += 8; in vis_blk_fldst()
1809 sync_data_memory((caddr_t)(ea - 64), 64); in vis_blk_fldst()