3183 	uint32_t	hiword;  in pcicfg_update_reg_prop()  local
3212 	hiword = PCICFG_MAKE_REG_HIGH(PCI_REG_BUS_G(reg->pci_phys_hi),  in pcicfg_update_reg_prop()
3218 		hiword |= PCI_ADDR_MEM32;  in pcicfg_update_reg_prop()
3224 				hiword |= PCI_ADDR_MEM32;  in pcicfg_update_reg_prop()
3227 				hiword |= PCI_ADDR_MEM64;  in pcicfg_update_reg_prop()
3230 			hiword |= PCI_ADDR_IO;  in pcicfg_update_reg_prop()
3234 	addition.pci_phys_hi = hiword;  in pcicfg_update_reg_prop()
3309 	uint32_t	hiword;  in pcicfg_update_assigned_prop_value()  local
3336 	hiword = PCICFG_MAKE_REG_HIGH(PCI_REG_BUS_G(reg->pci_phys_hi),  in pcicfg_update_assigned_prop_value()
3340 	hiword |= PCI_REG_REL_M;  in pcicfg_update_assigned_prop_value()
3343 		hiword |= PCI_ADDR_MEM32;  in pcicfg_update_assigned_prop_value()
3349 				hiword |= PCI_ADDR_MEM32;  in pcicfg_update_assigned_prop_value()
3352 				hiword |= PCI_ADDR_MEM64;  in pcicfg_update_assigned_prop_value()
3356 				hiword |= PCI_REG_PF_M;  in pcicfg_update_assigned_prop_value()
3360 			hiword |= PCI_ADDR_IO;  in pcicfg_update_assigned_prop_value()
3367 	addition.pci_phys_hi = hiword;  in pcicfg_update_assigned_prop_value()
3373 	DEBUG3("updating BAR@off %x with %x,%x\n", reg_offset, hiword, size);  in pcicfg_update_assigned_prop_value()
6010 	uint32_t request, hiword, size;  in pcicfg_fcode_assign_bars()  local
6036 		hiword = PCICFG_MAKE_REG_HIGH(bus, device, func, i);  in pcicfg_fcode_assign_bars()
6045 				hiword |= PCI_ADDR_MEM32;  in pcicfg_fcode_assign_bars()
6048 				hiword |= PCI_ADDR_MEM64;  in pcicfg_fcode_assign_bars()
6051 				hiword |= PCI_REG_PF_M;  in pcicfg_fcode_assign_bars()
6053 			hiword |= PCI_ADDR_IO;  in pcicfg_fcode_assign_bars()
6055 		phys_spec.pci_phys_hi = hiword;  in pcicfg_fcode_assign_bars()