Lines Matching refs:uint8_t
105 uint8_t qes_min:4; /* minimum entry size */
106 uint8_t qes_max:4; /* maximum entry size */
112 uint8_t psd_rsvd1;
113 uint8_t psd_mps:1; /* Max Power Scale (1.1) */
114 uint8_t psd_nops:1; /* Non-Operational State (1.1) */
115 uint8_t psd_rsvd2:6;
118 uint8_t psd_rrt:5; /* Relative Read Throughput */
119 uint8_t psd_rsvd3:3;
120 uint8_t psd_rrl:5; /* Relative Read Latency */
121 uint8_t psd_rsvd4:3;
122 uint8_t psd_rwt:5; /* Relative Write Throughput */
123 uint8_t psd_rsvd5:3;
124 uint8_t psd_rwl:5; /* Relative Write Latency */
125 uint8_t psd_rsvd6:3;
127 uint8_t psd_rsvd7:6;
128 uint8_t psd_ips:2; /* Idle Power Scale (1.2) */
129 uint8_t psd_rsvd8;
131 uint8_t psd_apw:3; /* Active Power Workload (1.2) */
132 uint8_t psd_rsvd9:3;
133 uint8_t psd_aps:2; /* Active Power Scale */
134 uint8_t psd_rsvd10[9];
145 uint8_t id_rab; /* Recommended Arbitration Burst */
146 uint8_t id_oui[3]; /* vendor IEEE OUI */
148 uint8_t m_multi_pci:1; /* HW has multiple PCIe interfaces */
149 uint8_t m_multi_ctrl:1; /* HW has multiple controllers (1.1) */
150 uint8_t m_sr_iov:1; /* controller is SR-IOV virt fn (1.1) */
151 uint8_t m_rsvd:5;
153 uint8_t id_mdts; /* Maximum Data Transfer Size */
162 uint8_t id_rsvd_cc[12];
163 uint8_t id_frguid[16]; /* FRU GUID */
164 uint8_t id_rsvd2_cc[240 - 128];
165 uint8_t id_rsvd_nvmemi[255 - 240];
166 uint8_t id_mec; /* Management Endpiont Capabilities */
175 uint8_t id_acl; /* Abort Command Limit */
176 uint8_t id_aerl; /* Asynchronous Event Request Limit */
178 uint8_t fw_readonly:1; /* Slot 1 is Read-Only */
179 uint8_t fw_nslot:3; /* number of firmware slots */
180 uint8_t fw_rsvd:4;
183 uint8_t lp_smart:1; /* SMART/Health information per NS */
184 uint8_t lp_rsvd:7;
186 uint8_t id_elpe; /* Error Log Page Entries */
187 uint8_t id_npss; /* Number of Power States */
189 uint8_t av_spec:1; /* use format from spec */
190 uint8_t av_rsvd:7;
193 uint8_t ap_sup:1; /* APST supported (1.1) */
194 uint8_t ap_rsvd:7;
202 uint8_t ap_tnvmcap[16]; /* Total NVM Capacity in Bytes */
203 uint8_t ap_unvmcap[16]; /* Unallocated NVM Capacity */
207 uint8_t ap_dsto; /* Device Self-test Options */
208 uint8_t ap_fwug; /* Firmware Update Granularity */
214 uint8_t id_rsvd_ac[512 - 332];
235 uint8_t fn_format:1; /* Format applies to all NS */
236 uint8_t fn_sec_erase:1; /* Secure Erase applies to all NS */
237 uint8_t fn_crypt_erase:1; /* Cryptographic Erase supported */
238 uint8_t fn_rsvd:5;
241 uint8_t vwc_present:1; /* Volatile Write Cache present */
242 uint8_t rsvd:7;
247 uint8_t nv_spec:1; /* use format from spec */
248 uint8_t nv_rsvd:7;
250 uint8_t id_rsvd_nc_2;
259 uint8_t id_rsvd_nc_4[768 - 540];
262 uint8_t id_subnqn[1024 - 768]; /* Subsystem Qualified Name (1.2.1+) */
263 uint8_t id_rsvd_ioc[1792 - 1024];
264 uint8_t id_nvmof[2048 - 1792]; /* NVMe over Fabrics */
270 uint8_t id_vs[1024];
276 uint8_t lbaf_lbads; /* LBA Data Size */
277 uint8_t lbaf_rp:2; /* Relative Performance */
278 uint8_t lbaf_rsvd1:6;
287 uint8_t f_thin:1; /* Thin Provisioning */
288 uint8_t f_rsvd:7;
290 uint8_t id_nlbaf; /* Number of LBA formats */
292 uint8_t lba_format:4; /* LBA format */
293 uint8_t lba_extlba:1; /* extended LBA (includes metadata) */
294 uint8_t lba_rsvd:3;
297 uint8_t mc_extlba:1; /* extended LBA transfers */
298 uint8_t mc_separate:1; /* separate metadata transfers */
299 uint8_t mc_rsvd:6;
302 uint8_t dp_type1:1; /* Protection Information Type 1 */
303 uint8_t dp_type2:1; /* Protection Information Type 2 */
304 uint8_t dp_type3:1; /* Protection Information Type 3 */
305 uint8_t dp_first:1; /* first 8 bytes of metadata */
306 uint8_t dp_last:1; /* last 8 bytes of metadata */
307 uint8_t dp_rsvd:3;
310 uint8_t dp_pinfo:3; /* Protection Information enabled */
311 uint8_t dp_first:1; /* first 8 bytes of metadata */
312 uint8_t dp_rsvd:4;
315 uint8_t nm_shared:1; /* NS is shared (1.1) */
316 uint8_t nm_rsvd:7;
319 uint8_t rc_persist:1; /* Persist Through Power Loss (1.1) */
320 uint8_t rc_wr_excl:1; /* Write Exclusive (1.1) */
321 uint8_t rc_excl:1; /* Exclusive Access (1.1) */
322 uint8_t rc_wr_excl_r:1; /* Wr Excl - Registrants Only (1.1) */
323 uint8_t rc_excl_r:1; /* Excl Acc - Registrants Only (1.1) */
324 uint8_t rc_wr_excl_a:1; /* Wr Excl - All Registrants (1.1) */
325 uint8_t rc_excl_a:1; /* Excl Acc - All Registrants (1.1) */
326 uint8_t rc_rsvd:1;
328 uint8_t id_fpi; /* Format Progress Indicator (1.2) */
329 uint8_t id_dfleat; /* Deallocate Log. Block (1.3) */
337 uint8_t id_nvmcap[16]; /* NVM Capacity */
338 uint8_t id_rsvd1[104 - 64];
339 uint8_t id_nguid[16]; /* Namespace GUID (1.2) */
340 uint8_t id_eui64[8]; /* IEEE Extended Unique Id (1.1) */
343 uint8_t id_rsvd2[384 - 192];
345 uint8_t id_vs[4096 - 384]; /* Vendor Specific */
352 uint8_t nipc_crt; /* Controller Resource Types */
353 uint8_t nipc_rsvd0[32 - 5];
360 uint8_t nipc_rvsd1[64 - 48];
367 uint8_t nipc_rsvd2[4096 - 80];
395 uint8_t el_byte; /* Parameter Error Location byte */
396 uint8_t el_bit:3; /* Parameter Error Location bit */
397 uint8_t el_rsvd1:5;
400 uint8_t el_vendor; /* Vendor Specific Information avail */
401 uint8_t el_rsvd2[64 - 29];
411 uint8_t cw_avail:1; /* available space too low */
412 uint8_t cw_temp:1; /* temperature too high */
413 uint8_t cw_reliab:1; /* degraded reliability */
414 uint8_t cw_readonly:1; /* media is read-only */
415 uint8_t cw_volatile:1; /* volatile memory backup failed */
416 uint8_t cw_rsvd:3;
419 uint8_t hl_avail_spare; /* Available Spare */
420 uint8_t hl_avail_spare_thr; /* Available Spare Threshold */
421 uint8_t hl_used; /* Percentage Used */
422 uint8_t hl_rsvd1[32 - 6];
433 uint8_t hl_rsvd2[512 - 192];
437 uint8_t fw_afi:3; /* Active Firmware Slot */
438 uint8_t fw_rsvd1:5;
439 uint8_t fw_rsvd2[7];
441 uint8_t fw_rsvd3[512 - 64];
490 uint8_t arb_ab:3; /* Arbitration Burst */
491 uint8_t arb_rsvd:5;
492 uint8_t arb_lpw; /* Low Priority Weight */
493 uint8_t arb_mpw; /* Medium Priority Weight */
494 uint8_t arb_hpw; /* High Priority Weight */
518 uint8_t lr_type; /* Type */
520 uint8_t lr_write:1; /* may be overwritten */
521 uint8_t lr_hidden:1; /* hidden from OS/EFI/BIOS */
522 uint8_t lr_rsvd1:6;
524 uint8_t lr_rsvd2[14];
527 uint8_t lr_guid[16]; /* Unique Identifier */
528 uint8_t lr_rsvd3[16];
572 uint8_t ic_thr; /* Aggregation Threshold */
573 uint8_t ic_time; /* Aggregation Time */
601 uint8_t aec_avail:1; /* available space too low */
602 uint8_t aec_temp:1; /* temperature too high */
603 uint8_t aec_reliab:1; /* degraded reliability */
604 uint8_t aec_readonly:1; /* media is read-only */
605 uint8_t aec_volatile:1; /* volatile memory backup failed */
606 uint8_t aec_rsvd1:3;
607 uint8_t aec_rsvd2[3];
615 uint8_t apst_apste:1; /* APST enabled */
616 uint8_t apst_rsvd:7;
618 uint8_t r;
633 uint8_t spm_pbslc; /* Pre-Boot Software Load Count */
634 uint8_t spm_rsvd[3];