Lines Matching refs:tg3_flags
531 (tp->tg3_flags & TG3_FLAG_TX_PAUSE) ? "TX" : "", in tg3_link_report()
532 (tp->tg3_flags & TG3_FLAG_RX_PAUSE) ? "RX" : "", in tg3_link_report()
533 (tp->tg3_flags & (TG3_FLAG_TX_PAUSE |TG3_FLAG_RX_PAUSE)) ? "flow control" : ""); in tg3_link_report()
565 tp->tg3_flags &= ~(TG3_FLAG_RX_PAUSE | TG3_FLAG_TX_PAUSE); in tg3_setup_flow_control()
566 tp->tg3_flags |= new_tg3_flags; in tg3_setup_flow_control()
609 if (tp->tg3_flags & TG3_FLAG_10_100_ONLY) { in tg3_phy_copper_begin()
638 if (!(tp->tg3_flags & TG3_FLAG_10_100_ONLY) && in tg3_phy_copper_begin()
703 if (!(tp->tg3_flags & TG3_FLAG_INIT_COMPLETE)) in tg3_setup_copper_phy()
866 ((tp->tg3_flags & TG3_FLAG_PCIX_MODE) || in tg3_setup_copper_phy()
867 (tp->tg3_flags & TG3_FLAG_PCI_HIGH_SPEED))) { in tg3_setup_copper_phy()
1205 (tp->tg3_flags & (TG3_FLAG_RX_PAUSE | in tg3_setup_fiber_phy()
1215 if (!(tp->tg3_flags & TG3_FLAG_INIT_COMPLETE) || in tg3_setup_fiber_phy()
1258 if (!(tp->tg3_flags & TG3_FLAG_GOT_SERDES_FLOWCTL)) { in tg3_setup_fiber_phy()
1304 tp->tg3_flags |= in tg3_setup_fiber_phy()
1360 tp->tg3_flags & (TG3_FLAG_RX_PAUSE | in tg3_setup_fiber_phy()
1370 if (tp->tg3_flags & TG3_FLAG_INIT_COMPLETE) { in tg3_setup_fiber_phy()
1522 if (tp->tg3_flags & TG3_FLAG_NVRAM) { in tg3_chip_reset()
1559 (tp->tg3_flags & TG3_FLAG_PCIX_MODE)) in tg3_chip_reset()
1584 if (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) { in tg3_stop_fw()
1622 if (!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF)) { in tg3_restart_fw()
1793 (tp->tg3_flags & TG3_FLAG_PCIX_MODE)) { in tg3_setup_hw()
1847 if (!(tp->tg3_flags & TG3_FLAG_JUMBO_ENABLE)) { in tg3_setup_hw()
1998 if (tp->tg3_flags & TG3_FLAG_SPLIT_MODE) in tg3_setup_hw()
2046 if ((tp->tg3_flags & TG3_FLAG_PCIX_MODE) != 0) { in tg3_setup_hw()
2054 if (tp->tg3_flags & TG3_FLAG_SPLIT_MODE) in tg3_setup_hw()
2185 if (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) in tg3_setup_hw()
2231 tp->tg3_flags |= TG3_FLAG_NVRAM; in tg3_nvram_init()
2234 tp->tg3_flags |= TG3_FLAG_NVRAM_BUFFERED; in tg3_nvram_init()
2241 tp->tg3_flags &= ~(TG3_FLAG_NVRAM | TG3_FLAG_NVRAM_BUFFERED); in tg3_nvram_init()
2286 if (!(tp->tg3_flags & TG3_FLAG_NVRAM)) in tg3_nvram_read()
2289 if (tp->tg3_flags & TG3_FLAG_NVRAM_BUFFERED) in tg3_nvram_read()
2439 tp->tg3_flags |= TG3_FLAG_EEPROM_WRITE_PROT; in tg3_phy_probe()
2443 tp->tg3_flags |= TG3_FLAG_ENABLE_ASF; in tg3_phy_probe()
2445 tp->tg3_flags |= TG3_FLAG_SERDES_WOL_CAP; in tg3_phy_probe()
2499 if (tp->tg3_flags & TG3_FLAG_10_100_ONLY) in tg3_phy_probe()
2547 if (tp->tg3_flags & TG3_FLAG_10_100_ONLY) in tg3_phy_probe()
2690 tp->tg3_flags |= TG3_FLAG_PCIX_MODE; in tg3_get_invariants()
2700 tp->tg3_flags |= TG3_FLAG_PCI_HIGH_SPEED; in tg3_get_invariants()
2702 tp->tg3_flags |= TG3_FLAG_PCI_32BIT; in tg3_get_invariants()
2769 tp->tg3_flags |= TG3_FLAG_SPLIT_MODE; in tg3_get_invariants()
2785 tp->tg3_flags |= TG3_FLAG_10_100_ONLY; in tg3_get_invariants()
2864 if ((tp->tg3_flags & TG3_FLAG_PCIX_MODE) == 0) { in tg3_setup_dma()
3132 tp->tg3_flags &= ~(TG3_FLAG_INIT_COMPLETE|TG3_FLAG_GOT_SERDES_FLOWCTL); in tg3_disable()
3192 tp->tg3_flags = 0 & ~TG3_FLAG_INIT_COMPLETE; in tg3_probe()
3248 ((tp->tg3_flags & TG3_FLAG_PCIX_MODE) ? "X" : ""), in tg3_probe()
3249 ((tp->tg3_flags & TG3_FLAG_PCI_HIGH_SPEED) ? in tg3_probe()
3250 ((tp->tg3_flags & TG3_FLAG_PCIX_MODE) ? "133MHz" : "66MHz") : in tg3_probe()
3251 ((tp->tg3_flags & TG3_FLAG_PCIX_MODE) ? "100MHz" : "33MHz")), in tg3_probe()
3252 ((tp->tg3_flags & TG3_FLAG_PCI_32BIT) ? "32-bit" : "64-bit")); in tg3_probe()
3259 tp->tg3_flags |= TG3_FLAG_INIT_COMPLETE; in tg3_probe()