Lines Matching refs:i0
1164 prefetch [%i0 + (1 * CACHE_LINE)], #one_read
1180 andcc %i0, 7, %o3 ! is src long word aligned
1182 prefetch [%i0 + (2 * CACHE_LINE)], #one_read
1195 ldx [%i0], %o4
1196 add %i0, 8, %i0 ! increment src ptr
1206 ldx [%i0], %o4
1208 ldx [%i0+8], %o4
1209 add %i0, 16, %i0 ! increment src ptr
1218 andcc %i0, 32, %o3
1220 andcc %i0, 16, %o3
1222 andcc %i0, 8, %o3
1224 prefetch [%i0 + (3 * CACHE_LINE)], #one_read
1226 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1230 prefetch [%i0 + (3 * CACHE_LINE)], #one_read
1232 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1234 andcc %i0, 16, %o3
1236 andcc %i0, 8, %o3
1238 prefetch [%i0 + (3 * CACHE_LINE)], #one_read
1240 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1243 prefetch [%i0 + (3 * CACHE_LINE)], #one_read
1247 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1248 ldd [%i0], %d0
1249 add %i0, 8, %i0
1253 sub %i1, %i0, %i1
1255 ldda [%i0]ASI_BLK_P,%d16 ! block load
1264 stxa %g0,[%i0+%i1]ASI_STBI_P ! block initializing store
1265 stda %d0,[%i0+%i1]ASI_BLK_P
1266 add %i0, 64, %i0
1269 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1270 add %i1, %i0, %i1
1279 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1280 ldd [%i0], %d0
1281 ldd [%i0+8], %d2
1282 add %i0, 16, %i0
1286 sub %i1, %i0, %i1
1288 ldda [%i0]ASI_BLK_P,%d16 ! block load
1296 stxa %g0,[%i0+%i1]ASI_STBI_P ! block initializing store
1297 stda %d0,[%i0+%i1]ASI_BLK_P
1298 add %i0, 64, %i0
1302 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1303 add %i1, %i0, %i1
1313 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1314 ldd [%i0], %d0
1315 ldd [%i0+8], %d2
1316 ldd [%i0+16], %d4
1317 add %i0, 24, %i0
1321 sub %i1, %i0, %i1
1323 ldda [%i0]ASI_BLK_P,%d16 ! block load
1330 stxa %g0,[%i0+%i1]ASI_STBI_P ! block initializing store
1331 stda %d0,[%i0+%i1]ASI_BLK_P
1332 add %i0, 64, %i0
1337 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1338 add %i1, %i0, %i1
1349 ldd [%i0], %d0
1350 ldd [%i0+8], %d2
1351 ldd [%i0+16],%d4
1352 ldd [%i0+24],%d6
1353 add %i0, 32, %i0
1357 sub %i1, %i0, %i1
1359 ldda [%i0]ASI_BLK_P,%d16 ! block load
1365 stxa %g0,[%i0+%i1]ASI_STBI_P ! block initializing store
1366 stda %d0,[%i0+%i1]ASI_BLK_P
1367 add %i0, 64, %i0
1373 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1374 add %i1, %i0, %i1
1386 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1387 ldd [%i0], %d0
1388 ldd [%i0+8], %d2
1389 ldd [%i0+16], %d4
1390 ldd [%i0+24], %d6
1391 ldd [%i0+32], %d8
1392 add %i0, 40, %i0
1396 sub %i1, %i0, %i1
1398 ldda [%i0]ASI_BLK_P,%d16 ! block load
1403 stxa %g0,[%i0+%i1]ASI_STBI_P ! block initializing store
1404 stda %d0,[%i0+%i1]ASI_BLK_P
1405 add %i0, 64, %i0
1412 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1413 add %i1, %i0, %i1
1426 ldd [%i0], %d0
1427 ldd [%i0+8], %d2
1428 ldd [%i0+16], %d4
1429 ldd [%i0+24], %d6
1430 ldd [%i0+32], %d8
1431 ldd [%i0+40], %d10
1432 add %i0, 48, %i0
1436 sub %i1, %i0, %i1
1438 ldda [%i0]ASI_BLK_P,%d16 ! block load
1442 stxa %g0,[%i0+%i1]ASI_STBI_P ! block initializing store
1443 stda %d0,[%i0+%i1]ASI_BLK_P
1444 add %i0, 64, %i0
1452 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1453 add %i1, %i0, %i1
1467 ldd [%i0], %d0
1468 ldd [%i0+8], %d2
1469 ldd [%i0+16], %d4
1470 ldd [%i0+24], %d6
1471 ldd [%i0+32], %d8
1472 ldd [%i0+40], %d10
1473 ldd [%i0+48], %d12
1474 add %i0, 56, %i0
1478 sub %i1, %i0, %i1
1480 ldda [%i0]ASI_BLK_P,%d16 ! block load
1483 stxa %g0,[%i0+%i1]ASI_STBI_P ! block initializing store
1484 stda %d0,[%i0+%i1]ASI_BLK_P
1485 add %i0, 64, %i0
1494 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1495 add %i1, %i0, %i1
1509 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1512 sub %i1, %i0, %i1
1514 ldda [%i0]ASI_BLK_P,%d0
1516 stxa %g0,[%i0+%i1]ASI_STBI_P ! block initializing store
1517 stda %d0,[%i0+%i1]ASI_BLK_P
1518 add %i0, 64, %i0
1520 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1521 add %i1, %i0, %i1
1530 ldx [%i0], %o4 ! move 32 bytes
1533 ldx [%i0+8], %o4
1535 ldx [%i0+16], %o4
1536 add %i0, 32, %i0 ! increase src ptr by 32
1538 ldx [%i0-8], %o4
1547 ldx [%i0], %o4 ! move 8 bytes
1548 add %i0, 8, %i0 ! increase src ptr by 8
1559 ld [%i0], %o4 ! move 4 bytes
1560 add %i0, 4, %i0 ! increase src ptr by 4
1570 ldub [%i0], %o4 ! move a byte
1571 add %i0, 1, %i0
1578 ldub [%i0], %o4 ! move a half-word (src align unknown)
1579 ldub [%i0+1], %o3
1580 add %i0, 2, %i0
1589 ldub [%i0], %o4 ! move a word (src align unknown)
1590 ldub [%i0+1], %o3
1594 ldub [%i0+2], %o4
1597 ldub [%i0+3], %o4
1600 add %i0, 4, %i0 ! adjust src by 4
1614 andcc %i0, 0x1, %o4
1617 andcc %i0, 2, %o4 ! check for half word alignment
1622 ld [%i0], %o4 ! load 4 bytes
1624 ld [%i0+4], %o4 ! load 4 bytes
1625 add %i0, 8, %i0 ! increase src ptr by 8
1635 lduh [%i0], %o4 ! load 2 bytes
1637 lduw [%i0+2], %o4
1640 lduh [%i0+6], %o4
1643 add %i0, 8, %i0
1652 sub %i1, %i0, %i1 ! share pointer advance
1654 ldub [%i0], %o4
1656 lduh [%i0+1], %o4
1659 lduh [%i0+3], %o4
1662 lduh [%i0+5], %o4
1665 ldub [%i0+7], %o4
1667 stx %i3, [%i1+%i0]
1670 add %i0, 8, %i0
1671 add %i1,%i0, %i1 ! restore pointer
1944 andn %i0, 0x7, %o4 ! %o4 has long word aligned src address
1945 add %i0, %i3, %i0 ! advance %i0 to after multiple of 8
1961 ldub [%i0], %o4
1963 ldub [%i0+1], %o4
1966 ldub [%i0+2], %o4
1969 ldub [%i0+3], %o4
1972 ldub [%i0+4], %o4
1974 ldub [%i0+5], %o4
1977 ldub [%i0+6], %o4
1980 ldub [%i0+7], %o4
1983 add %i0, 8, %i0
1990 ldub [%i0], %o3 ! read byte
1993 ldub [%i0+1], %o4
1996 ldub [%i0+2], %o4
2000 ldub [%i0+3], %o4
2001 add %i0, 4, %i0 ! advance src by 4
2011 ldub [%i0], %o4 ! load one byte
2014 ldub [%i0+1], %o4 ! load second byte
2018 ldub [%i0+2], %o4 ! load third byte
2086 subcc %i1, %i0, %i3
2106 mov %i0, %i1
2107 mov %i5, %i0
2110 andcc %i0, 0x3f, %i3 ! is dst aligned on a 64 bytes
2120 or %i0, %i1, %o2
2137 stb %o2, [%i0]
2141 inc %i0
2149 st %o2, [%i0]
2153 add %i0, 0x4, %i0
2161 stuh %o2, [%i0]
2165 add %i0, 0x2, %i0
2173 stx %o2, [%i0]
2177 add %i0, 0x8, %i0
2206 stxa %l3, [%i0+0x0]%asi
2207 stxa %l4, [%i0+0x8]%asi
2210 stxa %l5, [%i0+0x10]%asi
2211 stxa %l2, [%i0+0x18]%asi
2214 stxa %l3, [%i0+0x20]%asi
2215 stxa %l4, [%i0+0x28]%asi
2218 stxa %l5, [%i0+0x30]%asi
2219 stxa %l2, [%i0+0x38]%asi
2225 add %i0, 0x40, %i0
2244 stxa %l2, [%i0+0x0]%asi
2245 stxa %l3, [%i0+0x8]%asi
2249 stxa %l4, [%i0+0x10]%asi ! %l4 from previous read
2250 stxa %l5, [%i0+0x18]%asi ! into %l4 and %l5
2256 stxa %l2, [%i0+0x20]%asi
2257 stxa %l3, [%i0+0x28]%asi
2261 stxa %l4, [%i0+0x30]%asi
2262 stxa %l5, [%i0+0x38]%asi
2268 add %i0, 0x40, %i0
2290 stxa %l3, [%i0+0x0]%asi
2291 stxa %l4, [%i0+0x8]%asi
2295 stxa %l5, [%i0+0x10]%asi ! %l5 from previous read
2296 stxa %l2, [%i0+0x18]%asi ! into %l5 and %l2
2302 stxa %l3, [%i0+0x20]%asi
2303 stxa %l4, [%i0+0x28]%asi
2307 stxa %l5, [%i0+0x30]%asi
2308 stxa %l2, [%i0+0x38]%asi
2314 add %i0, 0x40, %i0
2329 stxa %l0, [%i0+0x0]%asi
2333 stxa %l1, [%i0+0x8]%asi
2334 stxa %l2, [%i0+0x10]%asi
2335 stxa %l3, [%i0+0x18]%asi
2336 stxa %l4, [%i0+0x20]%asi
2337 stxa %l5, [%i0+0x28]%asi
2338 stxa %l6, [%i0+0x30]%asi
2339 stxa %l7, [%i0+0x38]%asi
2344 add %i0, 0x40, %i0
2358 or %i1, %i0, %o2
2366 stx %o2, [%i0]
2371 add %i0, 0x8, %i0
2386 st %o2, [%i0]
2391 add %i0, 0x4, %i0
2407 stuh %o2, [%i0]
2412 add %i0, 0x2, %i0
2419 stb %o2, [%i0]
2423 inc %i0
2442 xor %i0, %i1, %o4 ! xor from and to address
2447 xor %i0, %i1, %o4 ! xor from and to address
2450 btst 3, %i0 ! delay slot, from address unaligned?
2457 ! i0 - src address, i1 - dest address, i2 - count
2477 ldub [%i0], %i3 ! read a byte from source address
2478 add %i0, 1, %i0 ! increment source address
2480 btst 3, %i0 ! is source aligned?
2487 ld [%i0], %i3 ! read a word
2488 add %i0, 4, %i0 ! increment source address
2534 ld [%i0], %i4 ! read a word
2535 add %i0, 4, %i0 ! increment source address
2552 ld [%i0], %i3 ! read a source word
2553 add %i0, 4, %i0 ! increment source address
2577 sub %i0, %i1, %i0 ! i0 gets the difference of src and dst
2582 ldub [%i0], %i3 ! read a byte from source address
2583 add %i0, 1, %i0 ! increment source address
2585 btst 3, %i0 ! is source aligned?
2607 sub %i0, %i1, %i0 ! i0 gets the difference of src and dst
2609 ldx [%i0+%i1], %o4 ! read from address
2623 ld [%i0+%i1], %o4 ! read from address
2635 sub %i0, %i1, %i0 ! i0 gets the difference of src and dst
2642 sub %i0, %i1, %i0 ! i0 gets difference of src and dst
2646 ! assumes dest in %i1 and (source - dest) in %i0
2654 ldub [%i0+%i1], %o4 ! read from address
2673 inc %i0 ! inc from
2678 btst %o0, %i0 ! %o0 is bit mask to check for alignment
2680 ldub [%i0], %o4 ! read next byte
2764 ! %i0 - source address (arg)
2774 prefetch [%i0+0x0], #one_read
2775 prefetch [%i0+0x40], #one_read
2777 prefetch [%i0+0x80], #one_read
2778 prefetch [%i0+0xc0], #one_read
2779 ldda [%i0+0x0]%asi, %l0
2780 ldda [%i0+0x10]%asi, %l2
2781 ldda [%i0+0x20]%asi, %l4
2782 ldda [%i0+0x30]%asi, %l6
2791 ldda [%i0+0x40]%asi, %l0
2792 ldda [%i0+0x50]%asi, %l2
2793 ldda [%i0+0x60]%asi, %l4
2794 ldda [%i0+0x70]%asi, %l6
2804 add %i0, 0x80, %i0
3536 prefetch [%i0 + (1 * CACHE_LINE)], #one_read
3549 andcc %i0, 7, %o3 ! is src long word aligned
3551 prefetch [%i0 + (2 * CACHE_LINE)], #one_read
3563 ldx [%i0], %o4
3564 add %i0, 8, %i0 ! increment src ptr
3574 ldx [%i0], %o4
3576 add %i0, 16, %i0 ! increment src ptr
3577 ldx [%i0-8], %o4
3587 andcc %i0, 32, %o3
3589 andcc %i0, 16, %o3
3591 andcc %i0, 8, %o3
3593 prefetch [%i0 + (3 * CACHE_LINE)], #one_read
3595 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3598 prefetch [%i0 + (3 * CACHE_LINE)], #one_read
3600 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3602 andcc %i0, 16, %o3
3604 andcc %i0, 8, %o3
3606 prefetch [%i0 + (3 * CACHE_LINE)], #one_read
3608 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3611 prefetch [%i0 + (3 * CACHE_LINE)], #one_read
3615 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3616 ldd [%i0], %d0
3617 add %i0, 8, %i0
3621 sub %i1, %i0, %i1
3623 ldda [%i0]ASI_BLK_P,%d16 ! block load
3632 stxa %g0,[%i0+%i1]ASI_STBI_AIUS ! block initializing store
3633 stda %d0,[%i0+%i1]ASI_BLK_AIUS
3634 add %i0, 64, %i0
3637 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3638 add %i1, %i0, %i1
3647 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3648 ldd [%i0], %d0
3649 ldd [%i0+8], %d2
3650 add %i0, 16, %i0
3654 sub %i1, %i0, %i1
3656 ldda [%i0]ASI_BLK_P,%d16 ! block load
3664 stxa %g0,[%i0+%i1]ASI_STBI_AIUS ! block initializing store
3665 stda %d0,[%i0+%i1]ASI_BLK_AIUS
3666 add %i0, 64, %i0
3670 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3671 add %i1, %i0, %i1
3681 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3682 ldd [%i0], %d0
3683 ldd [%i0+8], %d2
3684 ldd [%i0+16], %d4
3685 add %i0, 24, %i0
3689 sub %i1, %i0, %i1
3691 ldda [%i0]ASI_BLK_P,%d16 ! block load
3698 stxa %g0,[%i0+%i1]ASI_STBI_AIUS ! block initializing store
3699 stda %d0,[%i0+%i1]ASI_BLK_AIUS
3700 add %i0, 64, %i0
3705 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3706 add %i1, %i0, %i1
3717 ldd [%i0], %d0
3718 ldd [%i0+8], %d2
3719 ldd [%i0+16],%d4
3720 ldd [%i0+24],%d6
3721 add %i0, 32, %i0
3725 sub %i1, %i0, %i1
3727 ldda [%i0]ASI_BLK_P,%d16 ! block load
3733 stxa %g0,[%i0+%i1]ASI_STBI_AIUS ! block initializing store
3734 stda %d0,[%i0+%i1]ASI_BLK_AIUS
3735 add %i0, 64, %i0
3741 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3742 add %i1, %i0, %i1
3754 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3755 ldd [%i0], %d0
3756 ldd [%i0+8], %d2
3757 ldd [%i0+16], %d4
3758 ldd [%i0+24], %d6
3759 ldd [%i0+32], %d8
3760 add %i0, 40, %i0
3764 sub %i1, %i0, %i1
3766 ldda [%i0]ASI_BLK_P,%d16 ! block load
3771 stxa %g0,[%i0+%i1]ASI_STBI_AIUS ! block initializing store
3772 stda %d0,[%i0+%i1]ASI_BLK_AIUS
3773 add %i0, 64, %i0
3780 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3781 add %i1, %i0, %i1
3794 ldd [%i0], %d0
3795 ldd [%i0+8], %d2
3796 ldd [%i0+16], %d4
3797 ldd [%i0+24], %d6
3798 ldd [%i0+32], %d8
3799 ldd [%i0+40], %d10
3800 add %i0, 48, %i0
3804 sub %i1, %i0, %i1
3806 ldda [%i0]ASI_BLK_P,%d16 ! block load
3810 stxa %g0,[%i0+%i1]ASI_STBI_AIUS ! block initializing store
3811 stda %d0,[%i0+%i1]ASI_BLK_AIUS
3812 add %i0, 64, %i0
3820 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3821 add %i1, %i0, %i1
3835 ldd [%i0], %d0
3836 ldd [%i0+8], %d2
3837 ldd [%i0+16], %d4
3838 ldd [%i0+24], %d6
3839 ldd [%i0+32], %d8
3840 ldd [%i0+40], %d10
3841 ldd [%i0+48], %d12
3842 add %i0, 56, %i0
3846 sub %i1, %i0, %i1
3848 ldda [%i0]ASI_BLK_P,%d16 ! block load
3851 stxa %g0,[%i0+%i1]ASI_STBI_AIUS ! block initializing store
3852 stda %d0,[%i0+%i1]ASI_BLK_AIUS
3853 add %i0, 64, %i0
3862 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3863 add %i1, %i0, %i1
3877 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3880 sub %i1, %i0, %i1
3882 ldda [%i0]ASI_BLK_P,%d0
3884 stxa %g0,[%i0+%i1]ASI_STBI_AIUS ! block initializing store
3885 stda %d0,[%i0+%i1]ASI_BLK_AIUS
3886 add %i0, 64, %i0
3888 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3889 add %i1, %i0, %i1
3898 ldx [%i0], %o4 ! move 32 bytes
3901 ldx [%i0+8], %o4
3903 ldx [%i0+16], %o4
3904 add %i0, 32, %i0 ! increase src ptr by 32
3906 ldx [%i0-8], %o4
3915 ldx [%i0], %o4 ! move 8 bytes
3916 add %i0, 8, %i0 ! increase src ptr by 8
3927 ld [%i0], %o4 ! move 4 bytes
3928 add %i0, 4, %i0 ! increase src ptr by 4
3938 ldub [%i0], %o4 ! move a byte
3939 add %i0, 1, %i0
3946 ldub [%i0], %o4 ! move a half-word (src align unknown)
3947 ldub [%i0+1], %o3
3948 add %i0, 2, %i0
3958 ldub [%i0], %o4 ! move a word (src align unknown)
3959 ldub [%i0+1], %o3
3963 ldub [%i0+2], %o4
3966 ldub [%i0+3], %o4
3969 add %i0, 4, %i0 ! adjust src by 4
3983 andcc %i0, 0x1, %o4
3986 andcc %i0, 2, %o4 ! check for half word alignment
3991 ld [%i0], %o4 ! load 4 bytes
3993 ld [%i0+4], %o4 ! load 4 bytes
3994 add %i0, 8, %i0 ! increase src ptr by 8
4004 lduh [%i0], %o4 ! load 2 bytes
4006 lduw [%i0+2], %o4
4009 lduh [%i0+6], %o4
4012 add %i0, 8, %i0
4021 sub %i1, %i0, %i1 ! share pointer advance
4023 ldub [%i0], %o4
4025 lduh [%i0+1], %o4
4028 lduh [%i0+3], %o4
4031 lduh [%i0+5], %o4
4034 ldub [%i0+7], %o4
4036 stxa %i3, [%i1+%i0]ASI_USER
4039 add %i0, 8, %i0
4040 add %i1,%i0, %i1 ! restore pointer
4313 andn %i0, 0x7, %o4 ! %o4 has long word aligned src address
4314 add %i0, %i3, %i0 ! advance %i0 to after multiple of 8
4330 ldub [%i0], %o4
4332 ldub [%i0+1], %o4
4335 ldub [%i0+2], %o4
4338 ldub [%i0+3], %o4
4341 ldub [%i0+4], %o4
4343 ldub [%i0+5], %o4
4346 ldub [%i0+6], %o4
4349 ldub [%i0+7], %o4
4352 add %i0, 8, %i0
4359 ldub [%i0], %o3 ! read byte
4362 ldub [%i0+1], %o4
4365 ldub [%i0+2], %o4
4369 ldub [%i0+3], %o4
4370 add %i0, 4, %i0 ! advance src by 4
4381 ldub [%i0], %o4 ! load one byte
4384 ldub [%i0+1], %o4 ! load second byte
4388 ldub [%i0+2], %o4 ! load third byte
6243 andn %i0, 0x3f, %o4 ! %o4 has block aligned src address
6245 alignaddr %i0, %g0, %g0 ! generate %gsr
6246 add %i0, %i3, %i0 ! advance %i0 to after blocks
6249 andcc %i0, 0x20, %o3
6251 andcc %i0, 0x10, %o3
6253 andcc %i0, 0x08, %o3
6265 andcc %i0, 0x08, %o3
6272 prefetcha [%i0 + (4 * CACHE_LINE)]%asi, #one_read
7451 ! %i0 - start address
7458 andcc %i0, 0x3f, %g0
7473 mov %i0, %o0
7481 stxa %g0, [%i0+0x0]%asi
7482 stxa %g0, [%i0+0x40]%asi
7483 stxa %g0, [%i0+0x80]%asi
7484 stxa %g0, [%i0+0xc0]%asi
7486 stxa %g0, [%i0+0x8]%asi
7487 stxa %g0, [%i0+0x10]%asi
7488 stxa %g0, [%i0+0x18]%asi
7489 stxa %g0, [%i0+0x20]%asi
7490 stxa %g0, [%i0+0x28]%asi
7491 stxa %g0, [%i0+0x30]%asi
7492 stxa %g0, [%i0+0x38]%asi
7494 stxa %g0, [%i0+0x48]%asi
7495 stxa %g0, [%i0+0x50]%asi
7496 stxa %g0, [%i0+0x58]%asi
7497 stxa %g0, [%i0+0x60]%asi
7498 stxa %g0, [%i0+0x68]%asi
7499 stxa %g0, [%i0+0x70]%asi
7500 stxa %g0, [%i0+0x78]%asi
7502 stxa %g0, [%i0+0x88]%asi
7503 stxa %g0, [%i0+0x90]%asi
7504 stxa %g0, [%i0+0x98]%asi
7505 stxa %g0, [%i0+0xa0]%asi
7506 stxa %g0, [%i0+0xa8]%asi
7507 stxa %g0, [%i0+0xb0]%asi
7508 stxa %g0, [%i0+0xb8]%asi
7510 stxa %g0, [%i0+0xc8]%asi
7511 stxa %g0, [%i0+0xd0]%asi
7512 stxa %g0, [%i0+0xd8]%asi
7513 stxa %g0, [%i0+0xe0]%asi
7514 stxa %g0, [%i0+0xe8]%asi
7515 stxa %g0, [%i0+0xf0]%asi
7516 stxa %g0, [%i0+0xf8]%asi
7521 add %i0, 0x100, %i0
7530 stxa %g0, [%i0+0x0]%asi
7531 stxa %g0, [%i0+0x8]%asi
7532 stxa %g0, [%i0+0x10]%asi
7533 stxa %g0, [%i0+0x18]%asi
7534 stxa %g0, [%i0+0x20]%asi
7535 stxa %g0, [%i0+0x28]%asi
7536 stxa %g0, [%i0+0x30]%asi
7537 stxa %g0, [%i0+0x38]%asi
7541 add %i0, 0x40, %i0