Lines Matching refs:uint16_t
82 uint16_t v_minor;
83 uint16_t v_major;
111 uint16_t psd_mp; /* Maximum Power */
126 uint16_t psd_idlp; /* Idle Power (1.2) */
130 uint16_t psd_actp; /* Active Power (1.2) */
140 uint16_t id_vid; /* PCI vendor ID */
141 uint16_t id_ssvid; /* PCI subsystem vendor ID */
154 uint16_t id_cntlid; /* Unique Controller Identifier (1.1) */
170 uint16_t oa_security:1; /* Security Send & Receive */
171 uint16_t oa_format:1; /* Format NVM */
172 uint16_t oa_firmware:1; /* Firmware Activate & Download */
173 uint16_t oa_rsvd:13;
197 uint16_t ap_wctemp; /* Warning Composite Temperature */
198 uint16_t ap_cctemp; /* Critical Composite Temperature */
199 uint16_t ap_mtfa; /* Maximum Firmware Activation Time */
206 uint16_t ap_edstt; /* Extended Device Self-test time */
209 uint16_t ap_kas; /* Keep Alive Support */
210 uint16_t ap_hctma; /* Host Thermal Management */
211 uint16_t ap_mntmt; /* Minimum Thermal Temperature */
212 uint16_t ap_mxtmt; /* Maximum Thermal Temperature */
219 uint16_t id_maxcmd; /* Max Outstanding Commands (1.3) */
222 uint16_t on_compare:1; /* Compare */
223 uint16_t on_wr_unc:1; /* Write Uncorrectable */
224 uint16_t on_dset_mgmt:1; /* Dataset Management */
225 uint16_t on_wr_zero:1; /* Write Zeros (1.1) */
226 uint16_t on_save:1; /* Save/Select in Get/Set Feat (1.1) */
227 uint16_t on_reserve:1; /* Reservations (1.1) */
228 uint16_t on_rsvd:10;
231 uint16_t f_cmp_wr:1; /* Compare and Write */
232 uint16_t f_rsvd:15;
244 uint16_t id_awun; /* Atomic Write Unit Normal */
245 uint16_t id_awupf; /* Atomic Write Unit Power Fail */
251 uint16_t id_acwu; /* Atomic Compare & Write Unit (1.1) */
252 uint16_t id_rsvd_nc_3;
254 uint16_t sgl_sup:1; /* SGL Supported in NVM cmds (1.1) */
255 uint16_t sgl_rsvd1:15;
256 uint16_t sgl_bucket:1; /* SGL Bit Bucket supported (1.1) */
257 uint16_t sgl_rsvd2:15;
275 uint16_t lbaf_ms; /* Metadata Size */
330 uint16_t id_nawun; /* Atomic Write Unit Normal (1.2) */
331 uint16_t id_nawupf; /* Atomic Write Unit Power Fail (1.2) */
332 uint16_t id_nacwu; /* Atomic Compare & Write Unit (1.2) */
333 uint16_t id_nabsn; /* Atomic Boundary Size Normal (1.2) */
334 uint16_t id_nbao; /* Atomic Boundary Offset (1.2) */
335 uint16_t id_nabspf; /* Atomic Boundary Size Fail (1.2) */
336 uint16_t id_noiob; /* Optimal I/O Bondary (1.3) */
350 uint16_t nipc_cntlid; /* Controller ID */
351 uint16_t nipc_portid; /* Port Identifier */
356 uint16_t nipc_vqrfap; /* VQ Resources to Primary */
357 uint16_t nipc_vqprt; /* VQ Resources Private Total */
358 uint16_t nipc_vqfrsm; /* VQ Resources Secondary Max */
359 uint16_t nipc_vqgran; /* VQ Flexible Resource Gran */
363 uint16_t nipc_virfap; /* VI Flexible Allocatd to Primary */
364 uint16_t nipc_viprt; /* VI Resources Private Total */
365 uint16_t nipc_vifrsm; /* VI Resources Secondary Max */
366 uint16_t nipc_vigran; /* VI Flexible Granularity */
374 uint16_t sf_p:1; /* Phase Tag */
375 uint16_t sf_sc:8; /* Status Code */
376 uint16_t sf_sct:3; /* Status Code Type */
377 uint16_t sf_rsvd2:2;
378 uint16_t sf_m:1; /* More */
379 uint16_t sf_dnr:1; /* Do Not Retry */
392 uint16_t el_sqid; /* Submission Queue ID */
393 uint16_t el_cid; /* Command ID */
418 uint16_t hl_temp; /* Temperature */
536 uint16_t tt_tmpth; /* Temperature Threshold */
537 uint16_t tt_rsvd;
545 uint16_t er_tler; /* Time-Limited Error Recovery */
546 uint16_t er_rsvd;
563 uint16_t nq_nsq; /* Number of Submission Queues */
564 uint16_t nq_ncq; /* Number of Completion Queues */
574 uint16_t ic_rsvd;
582 uint16_t iv_iv; /* Interrupt Vector */
583 uint16_t iv_cd:1; /* Coalescing Disable */
584 uint16_t iv_rsvd:15;