267 	{ (void) INL(dp, EROMAR); (void) INL(dp, EROMAR); }
308 		ret = (ret << 1) | ((INL(dp, EROMAR) >> EROMAR_EEDO_SHIFT) & 1);  in sfe_read_eeprom()
471 	rfcr = INL(dp, RFCR);  in sfe_get_mac_addr_sis635()
483 		v = INL(dp, RFDR);  in sfe_get_mac_addr_sis635()
504 	for (i = 0; (INL(dp, MEAR) & EROMAR_EEGNT) == 0; i++) {  in sfe_get_mac_addr_sis962()
538 	lp->isr_pended |= INL(dp, ISR) & lp->our_intr_bits;  in sfe_reset_chip_sis900()
551 		done |= INL(dp, ISR) & (ISR_TXRCMP | ISR_RXRCMP);  in sfe_reset_chip_sis900()
557 		OUTL(dp, CR, lp->cr | INL(dp, CR));  in sfe_reset_chip_sis900()
562 	    dp->name, INL(dp, CFG), CFG_BITS_SIS900));  in sfe_reset_chip_sis900()
571 	    INL(dp, CFG), CFG_BITS_SIS900));  in sfe_reset_chip_sis900()
592 	lp->isr_pended |= INL(dp, ISR) & lp->our_intr_bits;  in sfe_reset_chip_dp83815()
599 	for (i = 0; INL(dp, CR) & CR_RST; i++) {  in sfe_reset_chip_dp83815()
613 	    dp->name, INL(dp, CFG), CFG_BITS_DP83815));  in sfe_reset_chip_dp83815()
614 	val = INL(dp, CFG) & (CFG_ANEG_SEL | CFG_PHY_CFG);  in sfe_reset_chip_dp83815()
617 	    INL(dp, CFG), CFG_BITS_DP83815));  in sfe_reset_chip_dp83815()
664 			ram[j] = INL(dp, RFDR);  in sfe_rxfilter_dump()
946 		val = INL(dp, ISR);  in sfe_stop_chip()
986 		val = INL(dp, ISR);  in sfe_stop_chip_quiesce()
1051 		val = INL(dp, CFG) & CFG_EDB_MASTER;  in sfe_set_media()
1138 		pcr = INL(dp, PCR);  in sfe_set_media()
1151 		    INL(dp, PCR), PCR_BITS));  in sfe_set_media()
1164 		    dp->name, INL(dp, FLOWCTL), FLOWCTL_BITS));  in sfe_set_media()
1553 	isr = INL(dp, ISR);  in sfe_interrupt()
1657 	return ((uint16_t)INL(dp, MII_REGS_BASE + offset*4));  in sfe_mii_read_dp83815()
1673 	srr = INL(dp, SRR) & SRR_REV;  in sfe_mii_config_dp83815()
1737 	val = INL(dp, CFG) & (CFG_ANEG_SEL | CFG_PHY_CFG);  in sfe_mii_probe_dp83815()
1752 	val = INL(dp, CFG) & (CFG_ANEG_SEL | CFG_PHY_CFG);  in sfe_mii_probe_dp83815()
1768 	val = INL(dp, CFG) & (CFG_ANEG_SEL | CFG_PHY_CFG);  in sfe_mii_init_dp83815()
1784 #define	MDIO_DELAY(dp)	{(void) INL(dp, MEAR); (void) INL(dp, MEAR); }
1853 	(void) INL(dp, MEAR);	/* delay */  in sfe_mii_read_sis900()
1854 	if (INL(dp, MEAR) & MEAR_MDIO) {  in sfe_mii_read_sis900()
1868 		(void) INL(dp, MEAR);	/* delay */  in sfe_mii_read_sis900()
1869 		ret = (ret << 1) | ((INL(dp, MEAR) >> MEAR_MDIO_SHIFT) & 1);  in sfe_mii_read_sis900()