Lines Matching refs:sc
317 rt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr) in rt2661_eeprom_read() argument
324 RT2661_EEPROM_CTL(sc, 0); in rt2661_eeprom_read()
326 RT2661_EEPROM_CTL(sc, RT2661_S); in rt2661_eeprom_read()
327 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); in rt2661_eeprom_read()
328 RT2661_EEPROM_CTL(sc, RT2661_S); in rt2661_eeprom_read()
331 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D); in rt2661_eeprom_read()
332 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C); in rt2661_eeprom_read()
335 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D); in rt2661_eeprom_read()
336 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C); in rt2661_eeprom_read()
337 RT2661_EEPROM_CTL(sc, RT2661_S); in rt2661_eeprom_read()
338 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); in rt2661_eeprom_read()
341 n = (RT2661_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7; in rt2661_eeprom_read()
343 RT2661_EEPROM_CTL(sc, RT2661_S | in rt2661_eeprom_read()
345 RT2661_EEPROM_CTL(sc, RT2661_S | in rt2661_eeprom_read()
349 RT2661_EEPROM_CTL(sc, RT2661_S); in rt2661_eeprom_read()
354 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C); in rt2661_eeprom_read()
355 tmp = RT2661_READ(sc, RT2661_E2PROM_CSR); in rt2661_eeprom_read()
357 RT2661_EEPROM_CTL(sc, RT2661_S); in rt2661_eeprom_read()
360 RT2661_EEPROM_CTL(sc, 0); in rt2661_eeprom_read()
363 RT2661_EEPROM_CTL(sc, RT2661_S); in rt2661_eeprom_read()
364 RT2661_EEPROM_CTL(sc, 0); in rt2661_eeprom_read()
365 RT2661_EEPROM_CTL(sc, RT2661_C); in rt2661_eeprom_read()
372 rt2661_read_eeprom(struct rt2661_softc *sc) in rt2661_read_eeprom() argument
374 struct ieee80211com *ic = &sc->sc_ic; in rt2661_read_eeprom()
379 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01); in rt2661_read_eeprom()
383 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23); in rt2661_read_eeprom()
387 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45); in rt2661_read_eeprom()
391 val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA); in rt2661_read_eeprom()
393 sc->rf_rev = (val >> 11) & 0x1f; in rt2661_read_eeprom()
394 sc->hw_radio = (val >> 10) & 0x1; in rt2661_read_eeprom()
395 sc->rx_ant = (val >> 4) & 0x3; in rt2661_read_eeprom()
396 sc->tx_ant = (val >> 2) & 0x3; in rt2661_read_eeprom()
397 sc->nb_ant = val & 0x3; in rt2661_read_eeprom()
400 "RF revision=%d\n", sc->rf_rev); in rt2661_read_eeprom()
402 val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2); in rt2661_read_eeprom()
403 sc->ext_5ghz_lna = (val >> 6) & 0x1; in rt2661_read_eeprom()
404 sc->ext_2ghz_lna = (val >> 4) & 0x1; in rt2661_read_eeprom()
408 sc->ext_2ghz_lna, sc->ext_5ghz_lna); in rt2661_read_eeprom()
410 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET); in rt2661_read_eeprom()
412 sc->rssi_2ghz_corr = (int8_t)(val & 0xff); in rt2661_read_eeprom()
414 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET); in rt2661_read_eeprom()
416 sc->rssi_5ghz_corr = (int8_t)(val & 0xff); in rt2661_read_eeprom()
419 if (sc->ext_2ghz_lna) in rt2661_read_eeprom()
420 sc->rssi_2ghz_corr -= 14; in rt2661_read_eeprom()
421 if (sc->ext_5ghz_lna) in rt2661_read_eeprom()
422 sc->rssi_5ghz_corr -= 14; in rt2661_read_eeprom()
426 sc->rssi_2ghz_corr, sc->rssi_5ghz_corr); in rt2661_read_eeprom()
428 val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET); in rt2661_read_eeprom()
430 sc->rfprog = (val >> 8) & 0x3; in rt2661_read_eeprom()
432 sc->rffreq = val & 0xff; in rt2661_read_eeprom()
435 "RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq); in rt2661_read_eeprom()
439 val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i); in rt2661_read_eeprom()
440 sc->txpow[i * 2] = (int8_t)(val >> 8); in rt2661_read_eeprom()
443 rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]); in rt2661_read_eeprom()
444 sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); in rt2661_read_eeprom()
447 rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]); in rt2661_read_eeprom()
452 val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i); in rt2661_read_eeprom()
455 sc->bbp_prom[i].reg = val >> 8; in rt2661_read_eeprom()
456 sc->bbp_prom[i].val = val & 0xff; in rt2661_read_eeprom()
458 "BBP R%d=%02x\n", sc->bbp_prom[i].reg, in rt2661_read_eeprom()
459 sc->bbp_prom[i].val); in rt2661_read_eeprom()
476 rt2661_load_microcode(struct rt2661_softc *sc, const uint8_t *ucode_p, int size) in rt2661_load_microcode() argument
486 RT2661_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); in rt2661_load_microcode()
489 RT2661_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0); in rt2661_load_microcode()
490 RT2661_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); in rt2661_load_microcode()
491 RT2661_WRITE(sc, RT2661_HOST_CMD_CSR, 0); in rt2661_load_microcode()
494 RT2661_WRITE(sc, RT2661_MCU_CNTL_CSR, in rt2661_load_microcode()
499 RT2661_MEM_WRITE1(sc, off++, *fptr++); in rt2661_load_microcode()
502 RT2661_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); in rt2661_load_microcode()
505 RT2661_WRITE(sc, RT2661_MCU_CNTL_CSR, 0); in rt2661_load_microcode()
509 if (RT2661_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY) in rt2661_load_microcode()
608 rt2661_alloc_tx_ring(struct rt2661_softc *sc, in rt2661_alloc_tx_ring() argument
624 err = rt2661_alloc_dma_mem(sc->sc_dev, &rt2661_dma_attr, size, in rt2661_alloc_tx_ring()
648 err = rt2661_alloc_dma_mem(sc->sc_dev, in rt2661_alloc_tx_ring()
649 &rt2661_dma_attr, sc->sc_dmabuf_size, in rt2661_alloc_tx_ring()
682 rt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring) in rt2661_reset_tx_ring() argument
700 if (!RT2661_IS_FASTREBOOT(sc)) in rt2661_reset_tx_ring()
712 rt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring) in rt2661_free_tx_ring() argument
737 rt2661_alloc_rx_ring(struct rt2661_softc *sc, in rt2661_alloc_rx_ring() argument
751 err = rt2661_alloc_dma_mem(sc->sc_dev, &rt2661_dma_attr, size, in rt2661_alloc_rx_ring()
775 err = rt2661_alloc_dma_mem(sc->sc_dev, in rt2661_alloc_rx_ring()
776 &rt2661_dma_attr, sc->sc_dmabuf_size, in rt2661_alloc_rx_ring()
810 rt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring) in rt2661_reset_rx_ring() argument
817 if (!RT2661_IS_FASTREBOOT(sc)) in rt2661_reset_rx_ring()
827 rt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring) in rt2661_free_rx_ring() argument
847 rt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *ring) in rt2661_tx_dma_intr() argument
866 0, sc->sc_dmabuf_size, in rt2661_tx_dma_intr()
886 rt2661_tx_intr(struct rt2661_softc *sc) in rt2661_tx_intr() argument
888 struct ieee80211com *ic = &sc->sc_ic; in rt2661_tx_intr()
897 val = RT2661_READ(sc, RT2661_STA_CSR4); in rt2661_tx_intr()
903 ring = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq; in rt2661_tx_intr()
926 sc->sc_tx_retries++; in rt2661_tx_intr()
953 if (sc->sc_need_sched) { in rt2661_tx_intr()
954 sc->sc_need_sched = 0; in rt2661_tx_intr()
958 sc->sc_tx_timer = 0; in rt2661_tx_intr()
962 rt2661_rx_intr(struct rt2661_softc *sc) in rt2661_rx_intr() argument
964 struct ieee80211com *ic = &sc->sc_ic; in rt2661_rx_intr()
975 mutex_enter(&sc->sc_rxlock); in rt2661_rx_intr()
976 ring = &sc->rxq; in rt2661_rx_intr()
1002 sc->sc_rx_err++; in rt2661_rx_intr()
1007 sc->sc_rx_err++; in rt2661_rx_intr()
1012 0, sc->sc_dmabuf_size, in rt2661_rx_intr()
1019 (pktlen > sc->sc_dmabuf_size)) { in rt2661_rx_intr()
1022 sc->sc_rx_err++; in rt2661_rx_intr()
1029 sc->sc_rx_nobuf++; in rt2661_rx_intr()
1039 rssi = rt2661_get_rssi(sc, desc->rssi); in rt2661_rx_intr()
1043 sc->avg_rssi = (rssi + 7 * sc->avg_rssi) / 8; in rt2661_rx_intr()
1056 "rx intr idx=%u\n", sc->rxq.cur); in rt2661_rx_intr()
1059 mutex_exit(&sc->sc_rxlock); in rt2661_rx_intr()
1066 struct rt2661_softc *sc = (struct rt2661_softc *)data; in rt2661_softintr() local
1068 if (sc->sc_rx_pend) { in rt2661_softintr()
1069 sc->sc_rx_pend = 0; in rt2661_softintr()
1070 rt2661_rx_intr(sc); in rt2661_softintr()
1077 rt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg) in rt2661_tx_cmd() argument
1079 if (RT2661_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY) in rt2661_tx_cmd()
1082 RT2661_WRITE(sc, RT2661_H2M_MAILBOX_CSR, in rt2661_tx_cmd()
1085 RT2661_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd); in rt2661_tx_cmd()
1091 rt2661_mcu_wakeup(struct rt2661_softc *sc) in rt2661_mcu_wakeup() argument
1093 RT2661_WRITE(sc, RT2661_MAC_CSR11, 5 << 16); in rt2661_mcu_wakeup()
1095 RT2661_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7); in rt2661_mcu_wakeup()
1096 RT2661_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18); in rt2661_mcu_wakeup()
1097 RT2661_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20); in rt2661_mcu_wakeup()
1100 (void) rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0); in rt2661_mcu_wakeup()
1104 rt2661_mcu_cmd_intr(struct rt2661_softc *sc) in rt2661_mcu_cmd_intr() argument
1106 (void) RT2661_READ(sc, RT2661_M2H_CMD_DONE_CSR); in rt2661_mcu_cmd_intr()
1107 RT2661_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); in rt2661_mcu_cmd_intr()
1114 struct rt2661_softc *sc = (struct rt2661_softc *)arg; in rt2661_intr() local
1117 RT2661_GLOCK(sc); in rt2661_intr()
1119 if (!RT2661_IS_RUNNING(sc) || RT2661_IS_SUSPEND(sc)) { in rt2661_intr()
1120 RT2661_GUNLOCK(sc); in rt2661_intr()
1124 r1 = RT2661_READ(sc, RT2661_INT_SOURCE_CSR); in rt2661_intr()
1125 r2 = RT2661_READ(sc, RT2661_MCU_INT_SOURCE_CSR); in rt2661_intr()
1127 RT2661_GUNLOCK(sc); in rt2661_intr()
1132 RT2661_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f); in rt2661_intr()
1133 RT2661_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); in rt2661_intr()
1136 RT2661_WRITE(sc, RT2661_INT_SOURCE_CSR, r1); in rt2661_intr()
1137 RT2661_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2); in rt2661_intr()
1142 rt2661_tx_dma_intr(sc, &sc->mgtq); in rt2661_intr()
1148 sc->sc_rx_pend = 1; in rt2661_intr()
1149 (void) ddi_intr_trigger_softint(sc->sc_softintr_hdl, NULL); in rt2661_intr()
1155 rt2661_tx_dma_intr(sc, &sc->txq[0]); in rt2661_intr()
1161 rt2661_tx_dma_intr(sc, &sc->txq[1]); in rt2661_intr()
1167 rt2661_tx_dma_intr(sc, &sc->txq[2]); in rt2661_intr()
1173 rt2661_tx_dma_intr(sc, &sc->txq[3]); in rt2661_intr()
1179 rt2661_tx_intr(sc); in rt2661_intr()
1185 rt2661_mcu_cmd_intr(sc); in rt2661_intr()
1191 rt2661_mcu_wakeup(sc); in rt2661_intr()
1195 RT2661_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); in rt2661_intr()
1196 RT2661_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); in rt2661_intr()
1198 RT2661_GUNLOCK(sc); in rt2661_intr()
1208 rt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw) in rt2661_get_rssi() argument
1217 if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) { in rt2661_get_rssi()
1218 rssi += sc->rssi_2ghz_corr; in rt2661_get_rssi()
1227 rssi += sc->rssi_5ghz_corr; in rt2661_get_rssi()
1346 rt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc, in rt2661_setup_tx_desc() argument
1349 struct ieee80211com *ic = &sc->sc_ic; in rt2661_setup_tx_desc()
1406 struct rt2661_softc *sc = (struct rt2661_softc *)ic; in rt2661_send() local
1419 mutex_enter(&sc->sc_txlock); in rt2661_send()
1420 ring = &sc->txq[0]; in rt2661_send()
1424 sc->sc_need_sched = 1; in rt2661_send()
1425 sc->sc_tx_nobuf++; in rt2661_send()
1449 sc->sc_tx_err++; in rt2661_send()
1459 sc->sc_tx_err++; in rt2661_send()
1490 rt2661_ack_rate(ic, rate), ic->ic_flags) + sc->sifs; in rt2661_send()
1495 rt2661_setup_tx_desc(sc, desc, flags, 0, pktlen, rate, 0); in rt2661_send()
1513 RT2661_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << 0); in rt2661_send()
1524 mutex_exit(&sc->sc_txlock); in rt2661_send()
1532 struct rt2661_softc *sc = (struct rt2661_softc *)ic; in rt2661_mgmt_send() local
1545 if ((!RT2661_IS_RUNNING(sc)) || RT2661_IS_SUSPEND(sc)) { in rt2661_mgmt_send()
1550 ring = &sc->mgtq; in rt2661_mgmt_send()
1554 sc->sc_tx_nobuf++; in rt2661_mgmt_send()
1578 sc->sc_tx_err++; in rt2661_mgmt_send()
1586 sc->sc_tx_err++; in rt2661_mgmt_send()
1607 rate, ic->ic_flags) + sc->sifs; in rt2661_mgmt_send()
1618 rt2661_setup_tx_desc(sc, desc, flags, 0, pktlen, rate, RT2661_QID_MGT); in rt2661_mgmt_send()
1636 RT2661_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT); in rt2661_mgmt_send()
1728 rt2661_update_promisc(struct rt2661_softc *sc) in rt2661_update_promisc() argument
1732 tmp = RT2661_READ(sc, RT2661_TXRX_CSR0); in rt2661_update_promisc()
1735 if (!(sc->sc_rcr & RT2661_RCR_PROMISC)) in rt2661_update_promisc()
1738 RT2661_WRITE(sc, RT2661_TXRX_CSR0, tmp); in rt2661_update_promisc()
1741 (sc->sc_rcr & RT2661_RCR_PROMISC) ? "entering" : "leaving"); in rt2661_update_promisc()
1747 struct rt2661_softc *sc = (struct rt2661_softc *)ic; in rt2661_updateslot() local
1753 tmp = RT2661_READ(sc, RT2661_MAC_CSR9); in rt2661_updateslot()
1755 RT2661_WRITE(sc, RT2661_MAC_CSR9, tmp); in rt2661_updateslot()
1762 rt2661_set_slottime(struct rt2661_softc *sc) in rt2661_set_slottime() argument
1764 struct ieee80211com *ic = &sc->sc_ic; in rt2661_set_slottime()
1770 tmp = RT2661_READ(sc, RT2661_MAC_CSR9); in rt2661_set_slottime()
1772 RT2661_WRITE(sc, RT2661_MAC_CSR9, tmp); in rt2661_set_slottime()
1784 rt2661_enable_mrr(struct rt2661_softc *sc) in rt2661_enable_mrr() argument
1786 struct ieee80211com *ic = &sc->sc_ic; in rt2661_enable_mrr()
1789 tmp = RT2661_READ(sc, RT2661_TXRX_CSR4); in rt2661_enable_mrr()
1796 RT2661_WRITE(sc, RT2661_TXRX_CSR4, tmp); in rt2661_enable_mrr()
1800 rt2661_set_txpreamble(struct rt2661_softc *sc) in rt2661_set_txpreamble() argument
1804 tmp = RT2661_READ(sc, RT2661_TXRX_CSR4); in rt2661_set_txpreamble()
1807 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) in rt2661_set_txpreamble()
1810 RT2661_WRITE(sc, RT2661_TXRX_CSR4, tmp); in rt2661_set_txpreamble()
1814 rt2661_set_basicrates(struct rt2661_softc *sc) in rt2661_set_basicrates() argument
1816 struct ieee80211com *ic = &sc->sc_ic; in rt2661_set_basicrates()
1821 RT2661_WRITE(sc, RT2661_TXRX_CSR5, 0x3); in rt2661_set_basicrates()
1824 RT2661_WRITE(sc, RT2661_TXRX_CSR5, 0x150); in rt2661_set_basicrates()
1827 RT2661_WRITE(sc, RT2661_TXRX_CSR5, 0xf); in rt2661_set_basicrates()
1832 rt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid) in rt2661_set_bssid() argument
1837 RT2661_WRITE(sc, RT2661_MAC_CSR4, tmp); in rt2661_set_bssid()
1840 RT2661_WRITE(sc, RT2661_MAC_CSR5, tmp); in rt2661_set_bssid()
1848 rt2661_enable_tsf_sync(struct rt2661_softc *sc) in rt2661_enable_tsf_sync() argument
1850 struct ieee80211com *ic = &sc->sc_ic; in rt2661_enable_tsf_sync()
1853 tmp = RT2661_READ(sc, RT2661_TXRX_CSR9) & 0xff000000; in rt2661_enable_tsf_sync()
1862 RT2661_WRITE(sc, RT2661_TXRX_CSR9, tmp); in rt2661_enable_tsf_sync()
1869 struct rt2661_softc *sc = arg; in rt2661_next_scan() local
1870 struct ieee80211com *ic = &sc->sc_ic; in rt2661_next_scan()
1879 struct rt2661_softc *sc = (struct rt2661_softc *)ic; in rt2661_newassoc() local
1882 rt2661_amrr_node_init(&sc->amrr, &((struct rt2661_node *)ni)->amn); in rt2661_newassoc()
1895 struct rt2661_softc *sc = arg; in rt2661_iter_func() local
1898 rt2661_amrr_choose(&sc->amrr, ni, &rn->amn); in rt2661_iter_func()
1908 rt2661_rx_tune(struct rt2661_softc *sc) in rt2661_rx_tune() argument
1919 if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan)) in rt2661_rx_tune()
1921 if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) || in rt2661_rx_tune()
1922 (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna)) in rt2661_rx_tune()
1926 dbm = sc->avg_rssi; in rt2661_rx_tune()
1928 cca = RT2661_READ(sc, RT2661_STA_CSR1) & 0xffff; in rt2661_rx_tune()
1935 bbp17 = sc->bbp17; /* current value */ in rt2661_rx_tune()
1958 if (bbp17 != sc->bbp17) { in rt2661_rx_tune()
1960 "BBP17 %x->%x\n", sc->bbp17, bbp17); in rt2661_rx_tune()
1961 rt2661_bbp_write(sc, 17, bbp17); in rt2661_rx_tune()
1962 sc->bbp17 = bbp17; in rt2661_rx_tune()
1973 struct rt2661_softc *sc = arg; in rt2661_updatestats() local
1974 struct ieee80211com *ic = &sc->sc_ic; in rt2661_updatestats()
1977 rt2661_iter_func(sc, ic->ic_bss); in rt2661_updatestats()
1982 if (++sc->ncalls & 1) in rt2661_updatestats()
1983 rt2661_rx_tune(sc); in rt2661_updatestats()
1985 sc->sc_rssadapt_id = timeout(rt2661_updatestats, (void *)sc, in rt2661_updatestats()
1992 struct rt2661_softc *sc = (struct rt2661_softc *)ic; in rt2661_newstate() local
1998 RT2661_GLOCK(sc); in rt2661_newstate()
2001 sc->sc_ostate = ostate; in rt2661_newstate()
2006 if (sc->sc_scan_id != 0) { in rt2661_newstate()
2007 (void) untimeout(sc->sc_scan_id); in rt2661_newstate()
2008 sc->sc_scan_id = 0; in rt2661_newstate()
2011 if (sc->sc_rssadapt_id) { in rt2661_newstate()
2012 (void) untimeout(sc->sc_rssadapt_id); in rt2661_newstate()
2013 sc->sc_rssadapt_id = 0; in rt2661_newstate()
2020 tmp = RT2661_READ(sc, RT2661_TXRX_CSR9); in rt2661_newstate()
2021 RT2661_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff); in rt2661_newstate()
2025 rt2661_set_chan(sc, ic->ic_curchan); in rt2661_newstate()
2026 sc->sc_scan_id = timeout(rt2661_next_scan, (void *)sc, in rt2661_newstate()
2031 rt2661_set_chan(sc, ic->ic_curchan); in rt2661_newstate()
2034 rt2661_set_chan(sc, ic->ic_curchan); in rt2661_newstate()
2038 rt2661_set_slottime(sc); in rt2661_newstate()
2039 rt2661_enable_mrr(sc); in rt2661_newstate()
2040 rt2661_set_txpreamble(sc); in rt2661_newstate()
2041 rt2661_set_basicrates(sc); in rt2661_newstate()
2042 rt2661_set_bssid(sc, ni->in_bssid); in rt2661_newstate()
2051 sc->ncalls = 0; in rt2661_newstate()
2052 sc->avg_rssi = -95; /* reset EMA */ in rt2661_newstate()
2053 sc->sc_rssadapt_id = timeout(rt2661_updatestats, in rt2661_newstate()
2054 (void *)sc, drv_usectohz(200 * 1000)); in rt2661_newstate()
2055 rt2661_enable_tsf_sync(sc); in rt2661_newstate()
2062 RT2661_GUNLOCK(sc); in rt2661_newstate()
2064 err = sc->sc_newstate(ic, nstate, arg); in rt2661_newstate()
2090 rt2661_stop_locked(struct rt2661_softc *sc) in rt2661_stop_locked() argument
2094 if (RT2661_IS_RUNNING(sc)) { in rt2661_stop_locked()
2095 sc->sc_tx_timer = 0; in rt2661_stop_locked()
2098 RT2661_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16); in rt2661_stop_locked()
2101 tmp = RT2661_READ(sc, RT2661_TXRX_CSR0); in rt2661_stop_locked()
2102 RT2661_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); in rt2661_stop_locked()
2105 RT2661_WRITE(sc, RT2661_MAC_CSR1, 3); in rt2661_stop_locked()
2106 RT2661_WRITE(sc, RT2661_MAC_CSR1, 0); in rt2661_stop_locked()
2109 RT2661_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f); in rt2661_stop_locked()
2110 RT2661_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); in rt2661_stop_locked()
2113 RT2661_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); in rt2661_stop_locked()
2114 RT2661_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff); in rt2661_stop_locked()
2117 rt2661_reset_tx_ring(sc, &sc->txq[0]); in rt2661_stop_locked()
2118 rt2661_reset_tx_ring(sc, &sc->txq[1]); in rt2661_stop_locked()
2119 rt2661_reset_tx_ring(sc, &sc->txq[2]); in rt2661_stop_locked()
2120 rt2661_reset_tx_ring(sc, &sc->txq[3]); in rt2661_stop_locked()
2121 rt2661_reset_tx_ring(sc, &sc->mgtq); in rt2661_stop_locked()
2122 rt2661_reset_rx_ring(sc, &sc->rxq); in rt2661_stop_locked()
2127 rt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr) in rt2661_set_macaddr() argument
2132 RT2661_WRITE(sc, RT2661_MAC_CSR2, tmp); in rt2661_set_macaddr()
2135 RT2661_WRITE(sc, RT2661_MAC_CSR3, tmp); in rt2661_set_macaddr()
2139 rt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg) in rt2661_bbp_read() argument
2145 if (!(RT2661_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY)) in rt2661_bbp_read()
2156 RT2661_WRITE(sc, RT2661_PHY_CSR3, val); in rt2661_bbp_read()
2159 val = RT2661_READ(sc, RT2661_PHY_CSR3); in rt2661_bbp_read()
2171 rt2661_bbp_init(struct rt2661_softc *sc) in rt2661_bbp_init() argument
2180 val = rt2661_bbp_read(sc, 0); in rt2661_bbp_init()
2193 rt2661_bbp_write(sc, rt2661_def_bbp[i].reg, in rt2661_bbp_init()
2199 if (sc->bbp_prom[i].reg == 0) in rt2661_bbp_init()
2201 rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); in rt2661_bbp_init()
2209 rt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val) in rt2661_bbp_write() argument
2215 if (!(RT2661_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY)) in rt2661_bbp_write()
2226 RT2661_WRITE(sc, RT2661_PHY_CSR3, tmp); in rt2661_bbp_write()
2237 rt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c) in rt2661_select_band() argument
2249 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) || in rt2661_select_band()
2250 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) { in rt2661_select_band()
2254 sc->bbp17 = bbp17; in rt2661_select_band()
2255 rt2661_bbp_write(sc, 17, bbp17); in rt2661_select_band()
2256 rt2661_bbp_write(sc, 96, bbp96); in rt2661_select_band()
2257 rt2661_bbp_write(sc, 104, bbp104); in rt2661_select_band()
2259 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) || in rt2661_select_band()
2260 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) { in rt2661_select_band()
2261 rt2661_bbp_write(sc, 75, 0x80); in rt2661_select_band()
2262 rt2661_bbp_write(sc, 86, 0x80); in rt2661_select_band()
2263 rt2661_bbp_write(sc, 88, 0x80); in rt2661_select_band()
2266 rt2661_bbp_write(sc, 35, bbp35); in rt2661_select_band()
2267 rt2661_bbp_write(sc, 97, bbp97); in rt2661_select_band()
2268 rt2661_bbp_write(sc, 98, bbp98); in rt2661_select_band()
2270 tmp = RT2661_READ(sc, RT2661_PHY_CSR0); in rt2661_select_band()
2276 RT2661_WRITE(sc, RT2661_PHY_CSR0, tmp); in rt2661_select_band()
2279 sc->sifs = IEEE80211_IS_CHAN_5GHZ(c) ? 16 : 10; in rt2661_select_band()
2283 rt2661_select_antenna(struct rt2661_softc *sc) in rt2661_select_antenna() argument
2288 bbp4 = rt2661_bbp_read(sc, 4); in rt2661_select_antenna()
2289 bbp77 = rt2661_bbp_read(sc, 77); in rt2661_select_antenna()
2294 tmp = RT2661_READ(sc, RT2661_TXRX_CSR0); in rt2661_select_antenna()
2295 RT2661_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); in rt2661_select_antenna()
2297 rt2661_bbp_write(sc, 4, bbp4); in rt2661_select_antenna()
2298 rt2661_bbp_write(sc, 77, bbp77); in rt2661_select_antenna()
2301 RT2661_WRITE(sc, RT2661_TXRX_CSR0, tmp); in rt2661_select_antenna()
2305 rt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val) in rt2661_rf_write() argument
2311 if (!(RT2661_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY)) in rt2661_rf_write()
2323 RT2661_WRITE(sc, RT2661_PHY_CSR4, tmp); in rt2661_rf_write()
2326 sc->rf_regs[reg] = val; in rt2661_rf_write()
2333 rt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c) in rt2661_set_chan() argument
2335 struct ieee80211com *ic = &sc->sc_ic; in rt2661_set_chan()
2346 rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2; in rt2661_set_chan()
2353 power = sc->txpow[i]; in rt2661_set_chan()
2366 if (ic->ic_flags != sc->sc_curchan->ich_flags) { in rt2661_set_chan()
2367 rt2661_select_band(sc, c); in rt2661_set_chan()
2368 rt2661_select_antenna(sc); in rt2661_set_chan()
2370 sc->sc_curchan = c; in rt2661_set_chan()
2372 rt2661_rf_write(sc, RT2661_RF1, rfprog[i].r1); in rt2661_set_chan()
2373 rt2661_rf_write(sc, RT2661_RF2, rfprog[i].r2); in rt2661_set_chan()
2374 rt2661_rf_write(sc, RT2661_RF3, rfprog[i].r3 | power << 7); in rt2661_set_chan()
2375 rt2661_rf_write(sc, RT2661_RF4, rfprog[i].r4 | sc->rffreq << 10); in rt2661_set_chan()
2379 rt2661_rf_write(sc, RT2661_RF1, rfprog[i].r1); in rt2661_set_chan()
2380 rt2661_rf_write(sc, RT2661_RF2, rfprog[i].r2); in rt2661_set_chan()
2381 rt2661_rf_write(sc, RT2661_RF3, rfprog[i].r3 | power << 7 | 1); in rt2661_set_chan()
2382 rt2661_rf_write(sc, RT2661_RF4, rfprog[i].r4 | sc->rffreq << 10); in rt2661_set_chan()
2386 rt2661_rf_write(sc, RT2661_RF1, rfprog[i].r1); in rt2661_set_chan()
2387 rt2661_rf_write(sc, RT2661_RF2, rfprog[i].r2); in rt2661_set_chan()
2388 rt2661_rf_write(sc, RT2661_RF3, rfprog[i].r3 | power << 7); in rt2661_set_chan()
2389 rt2661_rf_write(sc, RT2661_RF4, rfprog[i].r4 | sc->rffreq << 10); in rt2661_set_chan()
2392 bbp3 = rt2661_bbp_read(sc, 3); in rt2661_set_chan()
2395 if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529) in rt2661_set_chan()
2398 rt2661_bbp_write(sc, 3, bbp3); in rt2661_set_chan()
2401 rt2661_bbp_write(sc, 94, bbp94); in rt2661_set_chan()
2409 rt2661_init(struct rt2661_softc *sc) in rt2661_init() argument
2413 struct ieee80211com *ic = &sc->sc_ic; in rt2661_init()
2417 RT2661_GLOCK(sc); in rt2661_init()
2419 rt2661_stop_locked(sc); in rt2661_init()
2421 if (!RT2661_IS_FWLOADED(sc)) { in rt2661_init()
2422 err = rt2661_load_microcode(sc, ucode, usize); in rt2661_init()
2428 sc->sc_flags |= RT2661_F_FWLOADED; in rt2661_init()
2432 RT2661_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].paddr); in rt2661_init()
2433 RT2661_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].paddr); in rt2661_init()
2434 RT2661_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].paddr); in rt2661_init()
2435 RT2661_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].paddr); in rt2661_init()
2438 RT2661_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.paddr); in rt2661_init()
2441 RT2661_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.paddr); in rt2661_init()
2444 RT2661_WRITE(sc, RT2661_TX_RING_CSR0, in rt2661_init()
2450 RT2661_WRITE(sc, RT2661_TX_RING_CSR1, in rt2661_init()
2456 RT2661_WRITE(sc, RT2661_RX_RING_CSR, in rt2661_init()
2462 RT2661_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa); in rt2661_init()
2465 RT2661_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f); in rt2661_init()
2468 RT2661_WRITE(sc, RT2661_RX_CNTL_CSR, 2); in rt2661_init()
2472 RT2661_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val); in rt2661_init()
2474 rt2661_set_macaddr(sc, ic->ic_macaddr); in rt2661_init()
2477 RT2661_WRITE(sc, RT2661_MAC_CSR1, 3); in rt2661_init()
2478 RT2661_WRITE(sc, RT2661_MAC_CSR1, 0); in rt2661_init()
2482 if (RT2661_READ(sc, RT2661_MAC_CSR12) & 8) in rt2661_init()
2489 rt2661_stop_locked(sc); in rt2661_init()
2490 RT2661_GUNLOCK(sc); in rt2661_init()
2494 if (rt2661_bbp_init(sc) != RT2661_SUCCESS) { in rt2661_init()
2495 rt2661_stop_locked(sc); in rt2661_init()
2496 RT2661_GUNLOCK(sc); in rt2661_init()
2501 sc->sc_curchan = ic->ic_bss->in_chan = ic->ic_curchan; in rt2661_init()
2502 rt2661_select_band(sc, sc->sc_curchan); in rt2661_init()
2503 rt2661_select_antenna(sc); in rt2661_init()
2504 rt2661_set_chan(sc, sc->sc_curchan); in rt2661_init()
2507 tmp = RT2661_READ(sc, RT2661_TXRX_CSR0) & 0xffff; in rt2661_init()
2515 if (!(sc->sc_rcr & RT2661_RCR_PROMISC)) in rt2661_init()
2519 RT2661_WRITE(sc, RT2661_TXRX_CSR0, tmp); in rt2661_init()
2525 *fptr = RT2661_MEM_READ1(sc, off++); in rt2661_init()
2529 RT2661_WRITE(sc, RT2661_MAC_CSR1, 4); in rt2661_init()
2532 RT2661_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); in rt2661_init()
2535 RT2661_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); in rt2661_init()
2536 RT2661_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); in rt2661_init()
2539 RT2661_WRITE(sc, RT2661_RX_CNTL_CSR, 1); in rt2661_init()
2540 RT2661_GUNLOCK(sc); in rt2661_init()
2547 rt2661_stop(struct rt2661_softc *sc) in rt2661_stop() argument
2549 if (!RT2661_IS_FASTREBOOT(sc)) in rt2661_stop()
2550 RT2661_GLOCK(sc); in rt2661_stop()
2551 rt2661_stop_locked(sc); in rt2661_stop()
2552 if (!RT2661_IS_FASTREBOOT(sc)) in rt2661_stop()
2553 RT2661_GUNLOCK(sc); in rt2661_stop()
2559 struct rt2661_softc *sc = (struct rt2661_softc *)arg; in rt2661_m_start() local
2560 struct ieee80211com *ic = &sc->sc_ic; in rt2661_m_start()
2563 err = rt2661_init(sc); in rt2661_m_start()
2572 RT2661_GLOCK(sc); in rt2661_m_start()
2573 sc->sc_flags |= RT2661_F_RUNNING; in rt2661_m_start()
2574 RT2661_GUNLOCK(sc); in rt2661_m_start()
2578 rt2661_stop(sc); in rt2661_m_start()
2585 struct rt2661_softc *sc = (struct rt2661_softc *)arg; in rt2661_m_stop() local
2587 (void) rt2661_stop(sc); in rt2661_m_stop()
2589 ieee80211_new_state(&sc->sc_ic, IEEE80211_S_INIT, -1); in rt2661_m_stop()
2591 RT2661_GLOCK(sc); in rt2661_m_stop()
2592 sc->sc_flags &= ~RT2661_F_RUNNING; in rt2661_m_stop()
2593 RT2661_GUNLOCK(sc); in rt2661_m_stop()
2599 struct rt2661_softc *sc = (struct rt2661_softc *)arg; in rt2661_m_ioctl() local
2600 struct ieee80211com *ic = &sc->sc_ic; in rt2661_m_ioctl()
2604 RT2661_GLOCK(sc); in rt2661_m_ioctl()
2607 if (RT2661_IS_RUNNING(sc)) { in rt2661_m_ioctl()
2608 RT2661_GUNLOCK(sc); in rt2661_m_ioctl()
2609 (void) rt2661_init(sc); in rt2661_m_ioctl()
2612 RT2661_GLOCK(sc); in rt2661_m_ioctl()
2616 RT2661_GUNLOCK(sc); in rt2661_m_ioctl()
2626 struct rt2661_softc *sc = (struct rt2661_softc *)arg; in rt2661_m_getprop() local
2629 err = ieee80211_getprop(&sc->sc_ic, pr_name, wldp_pr_num, in rt2661_m_getprop()
2639 struct rt2661_softc *sc = (struct rt2661_softc *)arg; in rt2661_m_propinfo() local
2641 ieee80211_propinfo(&sc->sc_ic, pr_name, wldp_pr_num, mph); in rt2661_m_propinfo()
2648 struct rt2661_softc *sc = (struct rt2661_softc *)arg; in rt2661_m_setprop() local
2649 ieee80211com_t *ic = &sc->sc_ic; in rt2661_m_setprop()
2654 RT2661_GLOCK(sc); in rt2661_m_setprop()
2657 if (RT2661_IS_RUNNING(sc)) { in rt2661_m_setprop()
2658 RT2661_GUNLOCK(sc); in rt2661_m_setprop()
2659 (void) rt2661_init(sc); in rt2661_m_setprop()
2662 RT2661_GLOCK(sc); in rt2661_m_setprop()
2667 RT2661_GUNLOCK(sc); in rt2661_m_setprop()
2674 struct rt2661_softc *sc = (struct rt2661_softc *)arg; in rt2661_m_tx() local
2675 struct ieee80211com *ic = &sc->sc_ic; in rt2661_m_tx()
2678 if (RT2661_IS_SUSPEND(sc)) { in rt2661_m_tx()
2726 struct rt2661_softc *sc = (struct rt2661_softc *)arg; in rt2661_m_promisc() local
2729 sc->sc_rcr |= RT2661_RCR_PROMISC; in rt2661_m_promisc()
2730 sc->sc_rcr |= RT2661_RCR_MULTI; in rt2661_m_promisc()
2732 sc->sc_rcr &= ~RT2661_RCR_PROMISC; in rt2661_m_promisc()
2733 sc->sc_rcr &= ~RT2661_RCR_MULTI; in rt2661_m_promisc()
2736 rt2661_update_promisc(sc); in rt2661_m_promisc()
2743 struct rt2661_softc *sc = (struct rt2661_softc *)arg; in rt2661_m_stat() local
2744 struct ieee80211com *ic = &sc->sc_ic; in rt2661_m_stat()
2748 RT2661_GLOCK(sc); in rt2661_m_stat()
2756 *val = sc->sc_tx_nobuf; in rt2661_m_stat()
2759 *val = sc->sc_rx_nobuf; in rt2661_m_stat()
2762 *val = sc->sc_rx_err; in rt2661_m_stat()
2778 *val = sc->sc_tx_err; in rt2661_m_stat()
2781 *val = sc->sc_tx_retries; in rt2661_m_stat()
2793 RT2661_GUNLOCK(sc); in rt2661_m_stat()
2796 RT2661_GUNLOCK(sc); in rt2661_m_stat()
2799 RT2661_GUNLOCK(sc); in rt2661_m_stat()
2807 struct rt2661_softc *sc; in rt2661_attach() local
2824 sc = ddi_get_soft_state(rt2661_soft_state_p, in rt2661_attach()
2826 ASSERT(sc != NULL); in rt2661_attach()
2827 RT2661_GLOCK(sc); in rt2661_attach()
2828 sc->sc_flags &= ~RT2661_F_SUSPEND; in rt2661_attach()
2829 RT2661_GUNLOCK(sc); in rt2661_attach()
2830 if (RT2661_IS_RUNNING(sc)) in rt2661_attach()
2831 (void) rt2661_init(sc); in rt2661_attach()
2848 sc = ddi_get_soft_state(rt2661_soft_state_p, instance); in rt2661_attach()
2849 ic = (struct ieee80211com *)&sc->sc_ic; in rt2661_attach()
2850 sc->sc_dev = devinfo; in rt2661_attach()
2853 err = ddi_regs_map_setup(devinfo, 0, &sc->sc_cfg_base, 0, 0, in rt2661_attach()
2854 &rt2661_csr_accattr, &sc->sc_cfg_handle); in rt2661_attach()
2861 cachelsz = ddi_get8(sc->sc_cfg_handle, in rt2661_attach()
2862 (uint8_t *)(sc->sc_cfg_base + PCI_CONF_CACHE_LINESZ)); in rt2661_attach()
2865 sc->sc_cachelsz = cachelsz << 2; in rt2661_attach()
2866 sc->sc_dmabuf_size = roundup(IEEE80211_MAX_LEN, sc->sc_cachelsz); in rt2661_attach()
2868 vendor_id = ddi_get16(sc->sc_cfg_handle, in rt2661_attach()
2869 (uint16_t *)((uintptr_t)(sc->sc_cfg_base) + PCI_CONF_VENID)); in rt2661_attach()
2870 device_id = ddi_get16(sc->sc_cfg_handle, in rt2661_attach()
2871 (uint16_t *)((uintptr_t)(sc->sc_cfg_base) + PCI_CONF_DEVID)); in rt2661_attach()
2881 ddi_put16(sc->sc_cfg_handle, in rt2661_attach()
2882 (uint16_t *)((uintptr_t)(sc->sc_cfg_base) + PCI_CONF_COMM), in rt2661_attach()
2884 ddi_put8(sc->sc_cfg_handle, in rt2661_attach()
2885 (uint8_t *)(sc->sc_cfg_base + PCI_CONF_LATENCY_TIMER), 0xa8); in rt2661_attach()
2886 ddi_put8(sc->sc_cfg_handle, in rt2661_attach()
2887 (uint8_t *)(sc->sc_cfg_base + PCI_CONF_ILINE), 0x10); in rt2661_attach()
2891 &sc->sc_io_base, 0, 0, &rt2661_csr_accattr, &sc->sc_io_handle); in rt2661_attach()
2914 sc->sc_intr_htable = kmem_zalloc(sizeof (ddi_intr_handle_t), KM_SLEEP); in rt2661_attach()
2916 err = ddi_intr_alloc(devinfo, sc->sc_intr_htable, in rt2661_attach()
2924 err = ddi_intr_get_pri(sc->sc_intr_htable[0], &sc->sc_intr_pri); in rt2661_attach()
2931 sc->amrr.amrr_min_success_threshold = 1; in rt2661_attach()
2932 sc->amrr.amrr_max_success_threshold = 15; in rt2661_attach()
2936 if ((val = RT2661_READ(sc, RT2661_MAC_CSR0)) != 0) in rt2661_attach()
2947 rt2661_read_eeprom(sc); in rt2661_attach()
2952 rt2661_get_rf(sc->rf_rev), in rt2661_attach()
2974 err = rt2661_load_microcode(sc, ucode, usize); in rt2661_attach()
2981 sc->sc_flags = 0; in rt2661_attach()
2982 sc->sc_flags |= RT2661_F_FWLOADED; in rt2661_attach()
2988 err = rt2661_alloc_tx_ring(sc, &sc->txq[ac], in rt2661_attach()
2997 err = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT); in rt2661_attach()
3004 err = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT); in rt2661_attach()
3011 mutex_init(&sc->sc_genlock, NULL, MUTEX_DRIVER, NULL); in rt2661_attach()
3012 mutex_init(&sc->sc_txlock, NULL, MUTEX_DRIVER, NULL); in rt2661_attach()
3013 mutex_init(&sc->sc_rxlock, NULL, MUTEX_DRIVER, NULL); in rt2661_attach()
3055 sc->sc_newstate = ic->ic_newstate; in rt2661_attach()
3060 err = ddi_intr_add_softint(devinfo, &sc->sc_softintr_hdl, in rt2661_attach()
3061 DDI_INTR_SOFTPRI_MAX, rt2661_softintr, (caddr_t)sc); in rt2661_attach()
3068 err = ddi_intr_add_handler(sc->sc_intr_htable[0], rt2661_intr, in rt2661_attach()
3069 (caddr_t)sc, NULL); in rt2661_attach()
3076 err = ddi_intr_enable(sc->sc_intr_htable[0]); in rt2661_attach()
3098 macp->m_driver = sc; in rt2661_attach()
3133 (void) ddi_intr_disable(sc->sc_intr_htable[0]); in rt2661_attach()
3135 (void) ddi_intr_remove_handler(sc->sc_intr_htable[0]); in rt2661_attach()
3137 (void) ddi_intr_remove_softint(sc->sc_softintr_hdl); in rt2661_attach()
3138 sc->sc_softintr_hdl = NULL; in rt2661_attach()
3140 mutex_destroy(&sc->sc_genlock); in rt2661_attach()
3141 mutex_destroy(&sc->sc_txlock); in rt2661_attach()
3142 mutex_destroy(&sc->sc_rxlock); in rt2661_attach()
3144 rt2661_free_rx_ring(sc, &sc->rxq); in rt2661_attach()
3146 rt2661_free_tx_ring(sc, &sc->mgtq); in rt2661_attach()
3149 rt2661_free_tx_ring(sc, &sc->txq[ac]); in rt2661_attach()
3151 (void) ddi_intr_free(sc->sc_intr_htable[0]); in rt2661_attach()
3153 kmem_free(sc->sc_intr_htable, sizeof (ddi_intr_handle_t)); in rt2661_attach()
3155 ddi_regs_map_free(&sc->sc_io_handle); in rt2661_attach()
3157 ddi_regs_map_free(&sc->sc_cfg_handle); in rt2661_attach()
3166 struct rt2661_softc *sc; in rt2661_detach() local
3168 sc = ddi_get_soft_state(rt2661_soft_state_p, ddi_get_instance(devinfo)); in rt2661_detach()
3174 if (RT2661_IS_RUNNING(sc)) in rt2661_detach()
3175 rt2661_stop(sc); in rt2661_detach()
3176 RT2661_GLOCK(sc); in rt2661_detach()
3177 sc->sc_flags |= RT2661_F_SUSPEND; in rt2661_detach()
3178 sc->sc_flags &= ~RT2661_F_FWLOADED; in rt2661_detach()
3179 RT2661_GUNLOCK(sc); in rt2661_detach()
3187 if (mac_disable(sc->sc_ic.ic_mach) != 0) in rt2661_detach()
3193 (void) mac_unregister(sc->sc_ic.ic_mach); in rt2661_detach()
3195 (void) ddi_intr_remove_softint(sc->sc_softintr_hdl); in rt2661_detach()
3196 sc->sc_softintr_hdl = NULL; in rt2661_detach()
3197 (void) ddi_intr_disable(sc->sc_intr_htable[0]); in rt2661_detach()
3198 (void) ddi_intr_remove_handler(sc->sc_intr_htable[0]); in rt2661_detach()
3199 (void) ddi_intr_free(sc->sc_intr_htable[0]); in rt2661_detach()
3200 kmem_free(sc->sc_intr_htable, sizeof (ddi_intr_handle_t)); in rt2661_detach()
3205 ieee80211_detach(&sc->sc_ic); in rt2661_detach()
3207 mutex_destroy(&sc->sc_genlock); in rt2661_detach()
3208 mutex_destroy(&sc->sc_txlock); in rt2661_detach()
3209 mutex_destroy(&sc->sc_rxlock); in rt2661_detach()
3211 rt2661_free_tx_ring(sc, &sc->txq[0]); in rt2661_detach()
3212 rt2661_free_tx_ring(sc, &sc->txq[1]); in rt2661_detach()
3213 rt2661_free_tx_ring(sc, &sc->txq[2]); in rt2661_detach()
3214 rt2661_free_tx_ring(sc, &sc->txq[3]); in rt2661_detach()
3215 rt2661_free_tx_ring(sc, &sc->mgtq); in rt2661_detach()
3216 rt2661_free_rx_ring(sc, &sc->rxq); in rt2661_detach()
3218 ddi_regs_map_free(&sc->sc_io_handle); in rt2661_detach()
3219 ddi_regs_map_free(&sc->sc_cfg_handle); in rt2661_detach()
3232 struct rt2661_softc *sc; in rt2661_quiesce() local
3234 sc = ddi_get_soft_state(rt2661_soft_state_p, ddi_get_instance(dip)); in rt2661_quiesce()
3235 if (sc == NULL) in rt2661_quiesce()
3245 sc->sc_flags |= RT2661_F_QUIESCE; in rt2661_quiesce()
3250 rt2661_stop(sc); in rt2661_quiesce()