318 		v = INL(bfe, reg);  in bfe_wait_bit()
351 	return ((INL(bfe, BFE_MDIO_DATA) & BFE_MDIO_DATA_DATA));  in bfe_read_phy()
514 				val = INL(bfe, BFE_TX_CTRL);  in bfe_timeout()
518 					flow = INL(bfe, BFE_RXCONF);  in bfe_timeout()
522 					flow = INL(bfe, BFE_MAC_FLOW);  in bfe_timeout()
909 	if ((INL(bfe, BFE_SBTMSLOW) & BFE_RESET))  in bfe_core_disable()
939 	if (INL(bfe, BFE_SBTMSHIGH) & BFE_SERR)  in bfe_core_reset()
942 	val = INL(bfe, BFE_SBIMSTATE);  in bfe_core_reset()
967 	val = INL(bfe, BFE_SBIDHIGH) & BFE_IDH_CORE;  in bfe_setup_config()
969 	val = INL(bfe, BFE_SBINTVEC);  in bfe_setup_config()
973 	val = INL(bfe, BFE_SSB_PCI_TRANS_2);  in bfe_setup_config()
995 	val = INL(bfe, BFE_SBTMSLOW) &  in bfe_chip_reset()
1006 		if (INL(bfe, BFE_DMARX_STAT) & BFE_STAT_EMASK) {  in bfe_chip_reset()
1017 	val = INL(bfe, BFE_DEVCTRL);  in bfe_chip_reset()
1020 	else if (INL(bfe, BFE_DEVCTRL & BFE_EPR)) {  in bfe_chip_reset()
1089 	val = INL(bfe, BFE_RXCONF);  in bfe_set_rx_mode()
1271 		(void) INL(bfe, r);  in bfe_clear_stats()
1274 		(void) INL(bfe, r);  in bfe_clear_stats()
1289 		*v += INL(bfe, r);  in bfe_gather_stats()
1295 		*v += INL(bfe, r);  in bfe_gather_stats()
2140 	v = INL(bfe, BFE_DMATX_STAT);  in bfe_error_handler()
2150 	v = INL(bfe, BFE_DMARX_STAT);  in bfe_error_handler()
2207 	rxstat = INL(bfe, BFE_DMARX_STAT);  in bfe_receive()
2305 	cur = INL(r->r_bfe, BFE_DMATX_STAT) & BFE_STAT_CDMASK;  in bfe_tx_reclaim()
2383 	intr_stat = INL(bfe, BFE_INTR_STAT);  in bfe_interrupt()
2386 	(void) INL(bfe, BFE_INTR_STAT);  in bfe_interrupt()
2561 		prom[i] = INL(bfe, BFE_EEPROM_BASE + i * sizeof (uint32_t));  in bfe_get_chip_config()