Lines Matching refs:g7
92 rd %pc, %g7
657 mov WSTATE_USER32, %g7 ;\
688 mov WSTATE_USER64, %g7 ;\
934 srlx %g2, TAG_VALO_SHIFT, %g7 /* g7 = tsb tag */ ;\
941 srlx %g2, TAG_VALO_SHIFT, %g7 /* g7 = tsb tag */ ;\
978 srlx %g2, TAG_VALO_SHIFT, %g7 /* g7 = tsb tag */ ;\
985 srlx %g2, TAG_VALO_SHIFT, %g7 /* g7 = tsb tag */ ;\
1414 or %g2, %g0, %g7
1477 or %g0, %g0, %g7
1534 mov %g7, %l3 ! arg2 == misaligned address
1678 sethi %hi(fpu_exists), %g7
1679 ld [%g7 + %lo(fpu_exists)], %g7
1680 brz,pn %g7, .fp_exception_cont
1683 rdpr %tstate, %g7 ! branch if in privileged mode
1684 btst TSTATE_PRIV, %g7
1686 srl %g2, FSR_FTT_SHIFT, %g7 ! extract ftt from %fsr
1687 and %g7, (FSR_FTT>>FSR_FTT_SHIFT), %g7
1688 cmp %g7, FTT_UNFIN
1695 or %g0, 1, %g7
1696 st %g7, [%g1 + CPU_TL1_HDLR] ! set tl1_hdlr flag
1725 srl %g6, FITOS_RS2_SHIFT, %g7
1726 and %g7, FITOS_REG_MASK, %g7
1728 sllx %g7, 2, %g7
1729 jmp %g4 + %g7
1771 srl %g6, FITOS_RD_SHIFT, %g7
1772 and %g7, FITOS_REG_MASK, %g7
1774 sllx %g7, 2, %g7
1775 jmp %g4 + %g7
1820 set fpustat+FPUSTAT_UNFIN_KSTAT, %g7
1821 ldx [%g7], %g5
1825 casxa [%g7] ASI_N, %g5, %g6
1833 set fpuinfo+FPUINFO_FITOS_KSTAT, %g7
1834 ldx [%g7], %g5
1838 casxa [%g7] ASI_N, %g5, %g6
1893 wrpr %g0, %g7, %wstate
2119 sethi %hi(fpu_exists), %g7 ! check fpu_exists
2120 ld [%g7 + %lo(fpu_exists)], %g3
2374 GET_TRACE_TICK(%g6, %g7)
2388 CPU_PADDR(%g7, %g6);
2389 add %g7, CPU_TL1_HDLR, %g7
2390 lda [%g7]ASI_MEM, %g6
2393 ldx [%g6 + MMFSA_D_TYPE], %g7 ! XXXQ should be a MMFSA_F_ constant?
2396 or %g6, %g7, %g6
2400 TRACE_NEXT(%g5, %g6, %g7)
2402 CPU_PADDR(%g7, %g6);
2403 add %g7, CPU_TL1_HDLR, %g7 ! %g7 = &cpu_m.tl1_hdlr (PA)
2404 lda [%g7]ASI_MEM, %g6
2407 sta %g0, [%g7]ASI_MEM
2411 rdpr %tpc, %g7
2414 cmp %g7, %g6
2418 cmp %g7, %g6
2421 set fault_rtt_fn1, %g7
2425 rdpr %tpc, %g7
2428 cmp %g7, %g6
2432 cmp %g7, %g6
2436 srl %g7, 5, %g6 ! XXXQ need #define
2443 andn %g7, WTRAP_ALIGN, %g7 /* 128 byte aligned */
2444 add %g7, WTRAP_FAULTOFF, %g7
2450 wrpr %g0, %g7, %tnpc
2453 MMU_FAULT_STATUS_AREA(%g7)
2456 ldx [%g7 + MMFSA_D_ADDR], %g6
2457 ldx [%g7 + MMFSA_D_CTX], %g7
2459 cmp %g7, USER_CONTEXT_TYPE
2461 movgu %icc, USER_CONTEXT_TYPE, %g7
2462 or %g6, %g7, %g6 /* TAG_ACCESS */
2526 jmp %g7 + 4
2551 jmp %g7 + 4
2572 jmp %g7 + 4
2596 jmp %g7 + 4
2644 jmp %g7 + 4
2679 jmp %g7 + 4