Lines Matching refs:g3
123 rdpr %tt, %g3 ;\
157 mov arg, %g3 ;\
225 rdpr %tt, %g3 ;\
328 mov 12, %g3 ;\
329 sta %l3, [%sp + %g3]asi_num ;\
334 sta %l7, [%g4 + %g3]asi_num ;\
339 sta %i3, [%g4 + %g3]asi_num ;\
344 sta %i7, [%g4 + %g3]asi_num ;\
403 mov 12, %g3 ;\
405 lda [%sp + %g3]asi_num, %l3 ;\
410 lda [%g4 + %g3]asi_num, %l7 ;\
415 lda [%g4 + %g3]asi_num, %i3 ;\
420 lda [%g4 + %g3]asi_num, %i7 ;\
481 mov 16 + V9BIAS64, %g3 ;\
482 stxa %l2, [%sp + %g3]asi_num ;\
488 stxa %l6, [%g5 + %g3]asi_num ;\
493 stxa %i2, [%g5 + %g3]asi_num ;\
498 stxa %i6, [%g5 + %g3]asi_num ;\
553 mov V9BIAS64 + 16, %g3 ;\
554 ldxa [%sp + %g3]asi_num, %l2 ;\
560 ldxa [%g5 + %g3]asi_num, %l6 ;\
565 ldxa [%g5 + %g3]asi_num, %i2 ;\
570 ldxa [%g5 + %g3]asi_num, %i6 ;\
638 mov 12, %g3 ;\
639 sta %l3, [%sp + %g3]asi_num ;\
644 sta %l7, [%g4 + %g3]asi_num ;\
649 sta %i3, [%g4 + %g3]asi_num ;\
654 sta %i7, [%g4 + %g3]asi_num ;\
667 mov 16 + V9BIAS64, %g3 ;\
668 stxa %l2, [%sp + %g3]asi_num ;\
674 stxa %l6, [%g5 + %g3]asi_num ;\
679 stxa %i2, [%g5 + %g3]asi_num ;\
684 stxa %i6, [%g5 + %g3]asi_num ;\
726 rdpr %tt, %g3 ;\
738 or %g0, T_UNIMP_INSTR, %g3 ;\
750 or %g0, T_TAG_OVERFLOW, %g3 ;\
762 or %g0, T_IDIV0, %g3 ;\
773 or %g0, T_SOFTWARE_TRAP, %g3 ;\
836 MMU_FAULT_STATUS_AREA(%g3) ;\
838 ldx [%g3 + MMFSA_I_TYPE], %g1 ;\
839 ldx [%g3 + MMFSA_I_CTX], %g3 ;\
840 sllx %g3, SFSR_CTX_SHIFT, %g3 ;\
841 or %g3, %g1, %g3 ;\
857 MMU_FAULT_STATUS_AREA(%g3) ;\
858 ldx [%g3 + MMFSA_D_ADDR], %g2 ;\
861 ldx [%g3 + MMFSA_D_CTX], %g3 ;\
862 sllx %g3, SFSR_CTX_SHIFT, %g3 ;\
864 or %g3, %g1, %g3 ;\
871 MMU_FAULT_STATUS_AREA(%g3) ;\
872 ldx [%g3 + MMFSA_D_ADDR], %g2 ;\
875 ldx [%g3 + MMFSA_D_CTX], %g3 ;\
876 sllx %g3, SFSR_CTX_SHIFT, %g3 ;\
878 or %g3, %g1, %g3 /* SFSR */ ;\
931 GET_MMU_D_PTAGACC_CTXTYPE(%g2, %g3) /* 8 instr */ ;\
932 cmp %g3, INVALID_CONTEXT ;\
975 GET_MMU_I_PTAGACC_CTXTYPE(%g2, %g3) /* 8 instr */ ;\
976 cmp %g3, INVALID_CONTEXT ;\
1005 GET_MMU_D_PTAGACC_CTXTYPE(%g2, %g3) /* 8 instr */ ;\
1012 brnz,pt %g3, sfmmu_uprot_trap /* user trap */ ;\
1040 TRACE_PTR(%g3, %g6) ;\
1042 stxa %g6, [%g3 + TRAP_ENT_TICK]%asi ;\
1043 stna %g2, [%g3 + TRAP_ENT_SP]%asi /* tag access */ ;\
1044 stna %g5, [%g3 + TRAP_ENT_F1]%asi /* tsb data */ ;\
1046 stna %g6, [%g3 + TRAP_ENT_F2]%asi ;\
1047 stna %g1, [%g3 + TRAP_ENT_F3]%asi /* tsb pointer */ ;\
1048 stna %g0, [%g3 + TRAP_ENT_F4]%asi ;\
1050 stna %g6, [%g3 + TRAP_ENT_TPC]%asi ;\
1051 TRACE_SAVE_TL_GL_REGS(%g3, %g6) ;\
1054 stha %g1, [%g3 + TRAP_ENT_TT]%asi ;\
1062 stxa %g1, [%g3 + TRAP_ENT_TSTATE]%asi /* fault addr */ ;\
1069 stna %g1, [%g3 + TRAP_ENT_TR]%asi ;\
1070 TRACE_NEXT(%g3, %g4, %g6)
1381 ldx [%g4 + MMFSA_I_CTX], %g3 /* g3 = ctx */
1383 cmp %g3, USER_CONTEXT_TYPE
1385 movgu %icc, USER_CONTEXT_TYPE, %g3
1386 or %g2, %g3, %g2 /* TAG_ACCESS */
1387 mov T_INSTR_MMU_MISS, %g3 ! arg2 = traptype
1449 sllx %g3, 32, %g3
1450 or %g3, %g1, %g3
1511 mov T_FLUSH_PCB, %g3 ! through sys_trap on
1554 cmp %g3, T_SOFTWARE_TRAP
1559 rdpr %tt, %g3 ! delay - get actual hw trap type
1561 sub %g3, 254, %g1 ! UT_TRAP_INSTRUCTION_16 = p_utraps[18]
1568 cmp %g3, T_UNIMP_INSTR
1598 mov T_FLUSH_PCB, %g3 ! through sys_trap on
1867 mov T_FLUSH_PCB, %g3
2120 ld [%g7 + %lo(fpu_exists)], %g3
2121 brz,a,pn %g3, 4f
2178 mov %l0, %g1 ; mov %l1, %g2 ; mov %l2, %g3 ; mov %l4, %g4
2180 mov %g4, %l4 ; mov %g3, %l2 ; mov %g2, %l1 ; mov %g1, %l0
2189 mov %l0, %g1 ; mov %l1, %g2 ; mov %l2, %g3 ; mov %l4, %g4
2191 mov %g4, %l4 ; mov %g3, %l2 ; mov %g2, %l1 ; mov %g1, %l0
2199 rdpr %tstate, %g3 ! get tstate
2200 srlx %g3, PSR_TSTATE_CC_SHIFT, %o0 ! shift ccr to V8 psr
2221 set PSR_ICC, %g3
2222 and %g2, %g3, %g2 ! mask out rest
2224 rdpr %tstate, %g3 ! get tstate
2225 srl %g3, 0, %g3 ! clear upper word
2226 or %g3, %g2, %g3 ! or in new bits
2227 wrpr %g3, %tstate
2265 or %g0, CCR_ICC, %g3
2266 sllx %g3, TSTATE_CCR_SHIFT, %g2
2271 sllx %g2, PSR_TSTATE_CC_SHIFT, %g3 ! shift to tstate.ccr.icc
2272 wrpr %g1, %g3, %tstate ! write tstate
2281 ldn [%g2 + T_LWP], %g3 ! load klwp pointer
2282 ldn [%g3 + LWP_FPU], %g2 ! get lwp_fpu pointer
2505 TRACE_PTR(%g3, %g6)
2507 stxa %g6, [%g3 + TRAP_ENT_TICK]%asi
2508 TRACE_SAVE_TL_GL_REGS(%g3, %g6)
2510 stha %g6, [%g3 + TRAP_ENT_TT]%asi
2512 stxa %g6, [%g3 + TRAP_ENT_TSTATE]%asi
2513 stna %sp, [%g3 + TRAP_ENT_SP]%asi
2515 stna %g6, [%g3 + TRAP_ENT_TPC]%asi
2518 stxa %g4, [%g3 + TRAP_ENT_TR]%asi
2520 stxa %g4, [%g3 + TRAP_ENT_F1]%asi
2522 stxa %g4, [%g3 + TRAP_ENT_F2]%asi
2523 stxa %g6, [%g3 + TRAP_ENT_F3]%asi
2524 stna %g0, [%g3 + TRAP_ENT_F4]%asi
2525 TRACE_NEXT(%g3, %g4, %g5)
2530 TRACE_PTR(%g3, %g6)
2532 stxa %g6, [%g3 + TRAP_ENT_TICK]%asi
2533 TRACE_SAVE_TL_GL_REGS(%g3, %g6)
2535 stha %g6, [%g3 + TRAP_ENT_TT]%asi
2537 stxa %g6, [%g3 + TRAP_ENT_TSTATE]%asi
2538 stna %sp, [%g3 + TRAP_ENT_SP]%asi
2540 stna %g6, [%g3 + TRAP_ENT_TPC]%asi
2543 stxa %g4, [%g3 + TRAP_ENT_TR]%asi
2545 stxa %g4, [%g3 + TRAP_ENT_F1]%asi
2547 stxa %g4, [%g3 + TRAP_ENT_F2]%asi
2548 stxa %g6, [%g3 + TRAP_ENT_F3]%asi
2549 stna %g0, [%g3 + TRAP_ENT_F4]%asi
2550 TRACE_NEXT(%g3, %g4, %g5)
2555 TRACE_PTR(%g3, %g6)
2557 stxa %g6, [%g3 + TRAP_ENT_TICK]%asi
2558 TRACE_SAVE_TL_GL_REGS(%g3, %g6)
2560 stha %g6, [%g3 + TRAP_ENT_TT]%asi
2562 stxa %g6, [%g3 + TRAP_ENT_TSTATE]%asi
2563 stna %sp, [%g3 + TRAP_ENT_SP]%asi
2565 stna %g6, [%g3 + TRAP_ENT_TPC]%asi
2566 stna %g0, [%g3 + TRAP_ENT_TR]%asi
2567 stna %g0, [%g3 + TRAP_ENT_F1]%asi
2568 stna %g0, [%g3 + TRAP_ENT_F2]%asi
2569 stna %g0, [%g3 + TRAP_ENT_F3]%asi
2570 stna %g0, [%g3 + TRAP_ENT_F4]%asi
2571 TRACE_NEXT(%g3, %g4, %g5)
2642 stna %g3, [%g5 + TRAP_ENT_TR]%asi ! tsb4m pointer
2703 MMU_FAULT_STATUS_AREA(%g3)
2704 ldx [%g3 + MMFSA_D_ADDR], %g2
2707 ldx [%g3 + MMFSA_D_CTX], %g3
2708 sllx %g3, SFSR_CTX_SHIFT, %g3
2711 or %g3, %g1, %g3 /* SFSR */
2720 MMU_FAULT_STATUS_AREA(%g3)
2721 ldx [%g3 + MMFSA_D_ADDR], %g2
2724 ldx [%g3 + MMFSA_D_CTX], %g3
2725 sllx %g3, SFSR_CTX_SHIFT, %g3
2728 or %g3, %g1, %g3 /* SFSR */
2734 MMU_FAULT_STATUS_AREA(%g3)
2735 ldx [%g3 + MMFSA_D_ADDR], %g2
2736 ldx [%g3 + MMFSA_D_TYPE], %g1
2737 ldx [%g3 + MMFSA_D_CTX], %g4
2740 sllx %g4, SFSR_CTX_SHIFT, %g3
2741 or %g3, %g1, %g3 /* SFSR */
2845 ldn [%g2 + CPU_THREAD], %g3 /* load thread pointer */ ;\
2846 ldn [%g3 + T_PROCP], %g3 /* get proc pointer */ ;\
2847 ldn [%g3 + P_BRAND], %g3 /* get brand pointer */ ;\
2848 brz %g3, 1f /* No brand? No callback. */ ;\
2850 ldn [%g3 + B_MACHOPS], %g3 /* get machops list */ ;\
2851 ldn [%g3 + (callback_id << 3)], %g3 ;\
2852 brz %g3, 1f ;\
2865 jmp %g3 ;\