Lines Matching full:g2
55 ! %g2 arg 2
68 CPU_ADDR(%g1,%g2)
69 add %g1, CPU_MCPU, %g2
70 ldx [%g2 + MCPU_CPU_Q_BASE], %g3 ! %g3 = queue base PA
71 ldx [%g2 + MCPU_CPU_Q_SIZE], %g4 ! queue size
83 ! %g2 arg 2
89 ldxa [%g3 + %g6]ASI_MEM, %g2 ! read data word 2
110 stna %g2, [%g4 + TRAP_ENT_F3]%asi ! arg2
199 ! %g2 arg 2
212 CPU_ADDR(%g1,%g2)
213 add %g1, CPU_MCPU, %g2
214 ldx [%g2 + MCPU_DEV_Q_BASE], %g3 ! %g3 = queue base PA
229 ldx [%g2 + MCPU_DEV_Q_SIZE], %g4 ! queue size - delay slot
247 ldx [%g2 + MCPU_DEV_Q_SIZE], %g4 ! queue size - delay slot
251 ldx [%g2 + MCPU_DEV_Q_SIZE], %g4 ! queue size - delay slot
280 ldx [%g2 + MCPU_DEV_Q_SIZE], %g4 ! queue size
301 ldx [%g2 + MCPU_DEV_Q_BASE], %g6
307 ldx [%g2 + MCPU_DEV_Q_SIZE], %g6
344 ldxa [%g4]ASI_QUEUE, %g2 ! %g2 = Q head offset
347 mov %g2, %g6 ! save head in %g2
411 * Call sys_trap at PIL 14 unless we're already at PIL 15. %g2.l is
433 * Set %g2 to %g6, which is current head offset. %g2
438 mov %g6, %g2
460 ldxa [%g4]ASI_QUEUE, %g2 ! %g2 = Q head offset
464 cmp %g2, %g3
471 ldxa [%g4]ASI_QUEUE, %g2 ! %g2 = Q head offset
474 mov %g2, %g6 ! save head in %g2
534 * Call sys_trap. %g2 is TL(arg2), %g3 is head and tail
545 or %g3, %g2, %g3 ! %g3.l = head offset
546 rdpr %tl, %g2 ! %g2 = current tl
563 cmp %g2, 2
591 * Turn on the user spill/fill flag in %g2
595 or %g2, %g4, %g2 ! turn on flag in %g2
597 3: sub %g2, 1, %g2 ! %g2.l = previous tl