40     px_rc_err_t *epkt);
41 static uint_t px_err_intr(px_fault_t *fault_p, px_rc_err_t *epkt);
43     px_rc_err_t *epkt, pf_data_t *pfd_p);
45 static void px_err_log_handle(dev_info_t *dip, px_rc_err_t *epkt,
47 static void px_err_send_epkt_erpt(dev_info_t *dip, px_rc_err_t *epkt,
51     px_rc_err_t *epkt, pf_data_t *pfd_p);
53     px_rc_err_t *epkt, pf_data_t *pfd_p);
55     px_rc_err_t *epkt, pf_data_t *pfd_p);
57     px_rc_err_t *epkt, pf_data_t *pfd_p);
59     px_rc_err_t *epkt, pf_data_t *pfd_p);
61     px_rc_err_t *epkt, pf_data_t *pfd_p);
63     px_rc_err_t *epkt, pf_data_t *pfd_p);
65     px_rc_err_t *epkt);
67     px_rc_err_t *epkt);
87 	px_rc_err_t	*epkt = (px_rc_err_t *)fault_p->px_intr_payload;  in px_err_cb_intr()  local
89 	if (epkt != NULL) {  in px_err_cb_intr()
90 		return (px_err_intr(fault_p, epkt));  in px_err_cb_intr()
104 	px_rc_err_t	*epkt = (px_rc_err_t *)fault_p->px_intr_payload;  in px_err_dmc_pec_intr()  local
106 	if (epkt != NULL) {  in px_err_dmc_pec_intr()
107 		return (px_err_intr(fault_p, epkt));  in px_err_dmc_pec_intr()
141 px_err_fill_pfd(dev_info_t *dip, pf_data_t *pfd_p, px_rc_err_t *epkt) {  in px_err_fill_pfd()  argument
150 	switch (epkt->rc_descr.block) {  in px_err_fill_pfd()
156 		if (epkt->rc_descr.H) {  in px_err_fill_pfd()
157 			fault_bdf = (pcie_req_id_t)(epkt->hdr[0] >> 16);  in px_err_fill_pfd()
165 		pec_p = (px_pec_err_t *)epkt;  in px_err_fill_pfd()
264 px_err_intr(px_fault_t *fault_p, px_rc_err_t *epkt)  in px_err_intr()  argument
277 	PCIE_ROOT_EH_SRC(pfd_p)->intr_data = epkt;  in px_err_intr()
282 	derr.fme_ena = fm_ena_generate(epkt->stick, FM_ENA_FMT1);  in px_err_intr()
289 	rc_err = px_err_epkt_severity(px_p, &derr, epkt, pfd_p);  in px_err_intr()
311 	switch (epkt->rc_descr.block) {  in px_err_intr()
342 px_err_epkt_severity(px_t *px_p, ddi_fm_error_t *derr, px_rc_err_t *epkt,  in px_err_epkt_severity()  argument
379 		px_fix_legacy_epkt(dip, derr, epkt);  in px_err_epkt_severity()
387 	switch (epkt->rc_descr.block) {  in px_err_epkt_severity()
389 		err = px_cb_epkt_severity(dip, derr, epkt, pfd_p);  in px_err_epkt_severity()
392 		err = px_mmu_epkt_severity(dip, derr, epkt, pfd_p);  in px_err_epkt_severity()
395 		err = px_intr_epkt_severity(dip, derr, epkt, pfd_p);  in px_err_epkt_severity()
398 		err = px_port_epkt_severity(dip, derr, epkt, pfd_p);  in px_err_epkt_severity()
402 		err = px_pcie_epkt_severity(dip, derr, epkt, pfd_p);  in px_err_epkt_severity()
408 	px_err_fill_pfd(dip, pfd_p, epkt);  in px_err_epkt_severity()
412 			px_err_log_handle(dip, epkt, is_block_pci, "PANIC");  in px_err_epkt_severity()
416 			px_err_log_handle(dip, epkt, is_block_pci, "PROTECTED");  in px_err_epkt_severity()
420 			px_err_log_handle(dip, epkt, is_block_pci, "NO PANIC");  in px_err_epkt_severity()
424 			px_err_log_handle(dip, epkt, is_block_pci, "NO ERROR");  in px_err_epkt_severity()
427 		px_err_log_handle(dip, epkt, is_block_pci, "UNRECOGNIZED");  in px_err_epkt_severity()
434 	px_err_send_epkt_erpt(dip, epkt, is_block_pci, err, derr,  in px_err_epkt_severity()
445 px_err_send_epkt_erpt(dev_info_t *dip, px_rc_err_t *epkt,  in px_err_send_epkt_erpt()  argument
455 		px_pec_err_t *pec = (px_pec_err_t *)epkt;  in px_err_send_epkt_erpt()
500 		    epkt->rc_descr.block, epkt->rc_descr.op,  in px_err_send_epkt_erpt()
501 		    epkt->rc_descr.phase, epkt->rc_descr.cond,  in px_err_send_epkt_erpt()
502 		    epkt->rc_descr.dir, epkt->rc_descr.STOP,  in px_err_send_epkt_erpt()
503 		    epkt->rc_descr.H, epkt->rc_descr.R,  in px_err_send_epkt_erpt()
504 		    epkt->rc_descr.D, epkt->rc_descr.M,  in px_err_send_epkt_erpt()
505 		    epkt->rc_descr.S, epkt->size, epkt->addr,  in px_err_send_epkt_erpt()
506 		    epkt->hdr[0], epkt->hdr[1], epkt->reserved,  in px_err_send_epkt_erpt()
512 		    is_valid_epkt ? epkt->sysino : 0,  in px_err_send_epkt_erpt()
514 		    is_valid_epkt ? epkt->ehdl : 0,  in px_err_send_epkt_erpt()
516 		    is_valid_epkt ? epkt->stick : 0,  in px_err_send_epkt_erpt()
517 		    EPKT_DW0, DATA_TYPE_UINT64, ((uint64_t *)epkt)[3],  in px_err_send_epkt_erpt()
518 		    EPKT_DW1, DATA_TYPE_UINT64, ((uint64_t *)epkt)[4],  in px_err_send_epkt_erpt()
519 		    EPKT_DW2, DATA_TYPE_UINT64, ((uint64_t *)epkt)[5],  in px_err_send_epkt_erpt()
520 		    EPKT_DW3, DATA_TYPE_UINT64, ((uint64_t *)epkt)[6],  in px_err_send_epkt_erpt()
521 		    EPKT_DW4, DATA_TYPE_UINT64, ((uint64_t *)epkt)[7],  in px_err_send_epkt_erpt()
527 px_err_log_handle(dev_info_t *dip, px_rc_err_t *epkt, boolean_t is_block_pci,  in px_err_log_handle()  argument
531 		px_pec_err_t *pec = (px_pec_err_t *)epkt;  in px_err_log_handle()
555 		    msg, epkt->rc_descr.block, epkt->rc_descr.op,  in px_err_log_handle()
556 		    epkt->rc_descr.phase, epkt->rc_descr.cond,  in px_err_log_handle()
557 		    epkt->rc_descr.dir, epkt->rc_descr.STOP, epkt->rc_descr.H,  in px_err_log_handle()
558 		    epkt->rc_descr.R, epkt->rc_descr.D, epkt->rc_descr.M,  in px_err_log_handle()
559 		    epkt->rc_descr.S, epkt->size, epkt->addr, epkt->hdr[0],  in px_err_log_handle()
560 		    epkt->hdr[1], epkt->reserved);  in px_err_log_handle()
566 px_fix_legacy_epkt(dev_info_t *dip, ddi_fm_error_t *derr, px_rc_err_t *epkt)  in px_fix_legacy_epkt()  argument
572 	switch (epkt->rc_descr.block) {  in px_fix_legacy_epkt()
574 		switch (epkt->rc_descr.op) {  in px_fix_legacy_epkt()
576 			switch (epkt->rc_descr.phase) {  in px_fix_legacy_epkt()
578 				switch (epkt->rc_descr.cond) {  in px_fix_legacy_epkt()
580 					switch (epkt->rc_descr.dir) {  in px_fix_legacy_epkt()
582 						epkt->rc_descr.dir = DIR_READ;  in px_fix_legacy_epkt()
590 		switch (epkt->rc_descr.op) {  in px_fix_legacy_epkt()
592 			switch (epkt->rc_descr.phase) {  in px_fix_legacy_epkt()
594 				switch (epkt->rc_descr.cond) {  in px_fix_legacy_epkt()
596 					switch (epkt->rc_descr.dir) {  in px_fix_legacy_epkt()
598 						epkt->rc_descr.dir = DIR_WRITE;  in px_fix_legacy_epkt()
604 				switch (epkt->rc_descr.cond) {  in px_fix_legacy_epkt()
606 					switch (epkt->rc_descr.dir) {  in px_fix_legacy_epkt()
608 						epkt->rc_descr.phase = PH_ADDR;  in px_fix_legacy_epkt()
609 						epkt->rc_descr.cond = CND_IRR;  in px_fix_legacy_epkt()
616 		switch (epkt->rc_descr.op) {  in px_fix_legacy_epkt()
618 			switch (epkt->rc_descr.phase) {  in px_fix_legacy_epkt()
620 				switch (epkt->rc_descr.cond) {  in px_fix_legacy_epkt()
622 					switch (epkt->rc_descr.dir) {  in px_fix_legacy_epkt()
624 						epkt->rc_descr.dir = DIR_IRR;  in px_fix_legacy_epkt()
629 					switch (epkt->rc_descr.dir) {  in px_fix_legacy_epkt()
631 						epkt->rc_descr.cond = CND_OV;  in px_fix_legacy_epkt()
638 			switch (epkt->rc_descr.phase) {  in px_fix_legacy_epkt()
640 				switch (epkt->rc_descr.cond) {  in px_fix_legacy_epkt()
642 					switch (epkt->rc_descr.dir) {  in px_fix_legacy_epkt()
644 						epkt->rc_descr.op = OP_MSI32;  in px_fix_legacy_epkt()
645 						epkt->rc_descr.phase = PH_DATA;  in px_fix_legacy_epkt()
651 				switch (epkt->rc_descr.cond) {  in px_fix_legacy_epkt()
653 					switch (epkt->rc_descr.dir) {  in px_fix_legacy_epkt()
655 						epkt->rc_descr.op = OP_MSI32;  in px_fix_legacy_epkt()
666 px_intr_handle_errors(dev_info_t *dip, ddi_fm_error_t *derr, px_rc_err_t *epkt,  in px_intr_handle_errors()  argument
674 px_port_handle_errors(dev_info_t *dip, ddi_fm_error_t *derr, px_rc_err_t *epkt,  in px_port_handle_errors()  argument
685 	if (!((epkt->rc_descr.op == OP_PIO) &&  in px_port_handle_errors()
686 	    (epkt->rc_descr.phase == PH_IRR))) {  in px_port_handle_errors()
695 	if (!epkt->rc_descr.H) {  in px_port_handle_errors()
700 	adv_reg.pcie_ue_hdr[0] = (uint32_t)(epkt->hdr[0] >> 32);  in px_port_handle_errors()
701 	adv_reg.pcie_ue_hdr[1] = (uint32_t)(epkt->hdr[0]);  in px_port_handle_errors()
702 	adv_reg.pcie_ue_hdr[2] = (uint32_t)(epkt->hdr[1] >> 32);  in px_port_handle_errors()
703 	adv_reg.pcie_ue_hdr[3] = (uint32_t)(epkt->hdr[1]);  in px_port_handle_errors()
707 	if (epkt->rc_descr.M)  in px_port_handle_errors()
708 		adv_reg.pcie_ue_tgt_addr = epkt->addr;  in px_port_handle_errors()
710 	if (!((sts == DDI_SUCCESS) || (epkt->rc_descr.M))) {  in px_port_handle_errors()
725 	switch (epkt->rc_descr.cond) {  in px_port_handle_errors()
746 px_pcie_epkt_severity(dev_info_t *dip, ddi_fm_error_t *derr, px_rc_err_t *epkt,  in px_pcie_epkt_severity()  argument
749 	px_pec_err_t	*pec_p = (px_pec_err_t *)epkt;  in px_pcie_epkt_severity()
750 	px_err_pcie_t	*pcie = (px_err_pcie_t *)epkt;  in px_pcie_epkt_severity()
833 px_mmu_handle_lookup(dev_info_t *dip, ddi_fm_error_t *derr, px_rc_err_t *epkt)  in px_mmu_handle_lookup()  argument
835 	uint64_t addr = (uint64_t)epkt->addr;  in px_mmu_handle_lookup()
838 	if (epkt->rc_descr.H) {  in px_mmu_handle_lookup()
839 		bdf = (uint32_t)((epkt->hdr[0] >> 16) & 0xFFFF);  in px_mmu_handle_lookup()