Lines Matching refs:i0

1142 	prefetch [%i0 + (1 * CACHE_LINE)], #one_read
1158 andcc %i0, 7, %o3 ! is src long word aligned
1160 prefetch [%i0 + (2 * CACHE_LINE)], #one_read
1173 ldx [%i0], %o4
1174 add %i0, 8, %i0 ! increment src ptr
1184 ldx [%i0], %o4
1186 ldx [%i0+8], %o4
1187 add %i0, 16, %i0 ! increment src ptr
1196 andcc %i0, 32, %o3
1198 andcc %i0, 16, %o3
1200 andcc %i0, 8, %o3
1202 prefetch [%i0 + (3 * CACHE_LINE)], #one_read
1204 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1208 prefetch [%i0 + (3 * CACHE_LINE)], #one_read
1210 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1212 andcc %i0, 16, %o3
1214 andcc %i0, 8, %o3
1216 prefetch [%i0 + (3 * CACHE_LINE)], #one_read
1218 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1221 prefetch [%i0 + (3 * CACHE_LINE)], #one_read
1225 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1226 ldd [%i0], %d0
1227 add %i0, 8, %i0
1231 sub %i1, %i0, %i1
1233 ldda [%i0]ASI_BLK_P,%d16 ! block load
1242 stxa %g0,[%i0+%i1]ASI_STBI_P ! block initializing store
1243 stda %d0,[%i0+%i1]ASI_BLK_P
1244 add %i0, 64, %i0
1247 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1248 add %i1, %i0, %i1
1257 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1258 ldd [%i0], %d0
1259 ldd [%i0+8], %d2
1260 add %i0, 16, %i0
1264 sub %i1, %i0, %i1
1266 ldda [%i0]ASI_BLK_P,%d16 ! block load
1274 stxa %g0,[%i0+%i1]ASI_STBI_P ! block initializing store
1275 stda %d0,[%i0+%i1]ASI_BLK_P
1276 add %i0, 64, %i0
1280 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1281 add %i1, %i0, %i1
1291 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1292 ldd [%i0], %d0
1293 ldd [%i0+8], %d2
1294 ldd [%i0+16], %d4
1295 add %i0, 24, %i0
1299 sub %i1, %i0, %i1
1301 ldda [%i0]ASI_BLK_P,%d16 ! block load
1308 stxa %g0,[%i0+%i1]ASI_STBI_P ! block initializing store
1309 stda %d0,[%i0+%i1]ASI_BLK_P
1310 add %i0, 64, %i0
1315 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1316 add %i1, %i0, %i1
1327 ldd [%i0], %d0
1328 ldd [%i0+8], %d2
1329 ldd [%i0+16],%d4
1330 ldd [%i0+24],%d6
1331 add %i0, 32, %i0
1335 sub %i1, %i0, %i1
1337 ldda [%i0]ASI_BLK_P,%d16 ! block load
1343 stxa %g0,[%i0+%i1]ASI_STBI_P ! block initializing store
1344 stda %d0,[%i0+%i1]ASI_BLK_P
1345 add %i0, 64, %i0
1351 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1352 add %i1, %i0, %i1
1364 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1365 ldd [%i0], %d0
1366 ldd [%i0+8], %d2
1367 ldd [%i0+16], %d4
1368 ldd [%i0+24], %d6
1369 ldd [%i0+32], %d8
1370 add %i0, 40, %i0
1374 sub %i1, %i0, %i1
1376 ldda [%i0]ASI_BLK_P,%d16 ! block load
1381 stxa %g0,[%i0+%i1]ASI_STBI_P ! block initializing store
1382 stda %d0,[%i0+%i1]ASI_BLK_P
1383 add %i0, 64, %i0
1390 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1391 add %i1, %i0, %i1
1404 ldd [%i0], %d0
1405 ldd [%i0+8], %d2
1406 ldd [%i0+16], %d4
1407 ldd [%i0+24], %d6
1408 ldd [%i0+32], %d8
1409 ldd [%i0+40], %d10
1410 add %i0, 48, %i0
1414 sub %i1, %i0, %i1
1416 ldda [%i0]ASI_BLK_P,%d16 ! block load
1420 stxa %g0,[%i0+%i1]ASI_STBI_P ! block initializing store
1421 stda %d0,[%i0+%i1]ASI_BLK_P
1422 add %i0, 64, %i0
1430 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1431 add %i1, %i0, %i1
1445 ldd [%i0], %d0
1446 ldd [%i0+8], %d2
1447 ldd [%i0+16], %d4
1448 ldd [%i0+24], %d6
1449 ldd [%i0+32], %d8
1450 ldd [%i0+40], %d10
1451 ldd [%i0+48], %d12
1452 add %i0, 56, %i0
1456 sub %i1, %i0, %i1
1458 ldda [%i0]ASI_BLK_P,%d16 ! block load
1461 stxa %g0,[%i0+%i1]ASI_STBI_P ! block initializing store
1462 stda %d0,[%i0+%i1]ASI_BLK_P
1463 add %i0, 64, %i0
1472 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1473 add %i1, %i0, %i1
1487 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1490 sub %i1, %i0, %i1
1492 ldda [%i0]ASI_BLK_P,%d0
1494 stxa %g0,[%i0+%i1]ASI_STBI_P ! block initializing store
1495 stda %d0,[%i0+%i1]ASI_BLK_P
1496 add %i0, 64, %i0
1498 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
1499 add %i1, %i0, %i1
1508 ldx [%i0], %o4 ! move 32 bytes
1511 ldx [%i0+8], %o4
1513 ldx [%i0+16], %o4
1514 add %i0, 32, %i0 ! increase src ptr by 32
1516 ldx [%i0-8], %o4
1525 ldx [%i0], %o4 ! move 8 bytes
1526 add %i0, 8, %i0 ! increase src ptr by 8
1537 ld [%i0], %o4 ! move 4 bytes
1538 add %i0, 4, %i0 ! increase src ptr by 4
1548 ldub [%i0], %o4 ! move a byte
1549 add %i0, 1, %i0
1556 ldub [%i0], %o4 ! move a half-word (src align unknown)
1557 ldub [%i0+1], %o3
1558 add %i0, 2, %i0
1567 ldub [%i0], %o4 ! move a word (src align unknown)
1568 ldub [%i0+1], %o3
1572 ldub [%i0+2], %o4
1575 ldub [%i0+3], %o4
1578 add %i0, 4, %i0 ! adjust src by 4
1592 andcc %i0, 0x1, %o4
1595 andcc %i0, 2, %o4 ! check for half word alignment
1600 ld [%i0], %o4 ! load 4 bytes
1602 ld [%i0+4], %o4 ! load 4 bytes
1603 add %i0, 8, %i0 ! increase src ptr by 8
1613 lduh [%i0], %o4 ! load 2 bytes
1615 lduw [%i0+2], %o4
1618 lduh [%i0+6], %o4
1621 add %i0, 8, %i0
1630 sub %i1, %i0, %i1 ! share pointer advance
1632 ldub [%i0], %o4
1634 lduh [%i0+1], %o4
1637 lduh [%i0+3], %o4
1640 lduh [%i0+5], %o4
1643 ldub [%i0+7], %o4
1645 stx %i3, [%i1+%i0]
1648 add %i0, 8, %i0
1649 add %i1,%i0, %i1 ! restore pointer
1922 andn %i0, 0x7, %o4 ! %o4 has long word aligned src address
1923 add %i0, %i3, %i0 ! advance %i0 to after multiple of 8
1939 ldub [%i0], %o4
1941 ldub [%i0+1], %o4
1944 ldub [%i0+2], %o4
1947 ldub [%i0+3], %o4
1950 ldub [%i0+4], %o4
1952 ldub [%i0+5], %o4
1955 ldub [%i0+6], %o4
1958 ldub [%i0+7], %o4
1961 add %i0, 8, %i0
1968 ldub [%i0], %o3 ! read byte
1971 ldub [%i0+1], %o4
1974 ldub [%i0+2], %o4
1978 ldub [%i0+3], %o4
1979 add %i0, 4, %i0 ! advance src by 4
1989 ldub [%i0], %o4 ! load one byte
1992 ldub [%i0+1], %o4 ! load second byte
1996 ldub [%i0+2], %o4 ! load third byte
2064 subcc %i1, %i0, %i3
2084 mov %i0, %i1
2085 mov %i5, %i0
2088 andcc %i0, 0x3f, %i3 ! is dst aligned on a 64 bytes
2098 or %i0, %i1, %o2
2115 stb %o2, [%i0]
2119 inc %i0
2127 st %o2, [%i0]
2131 add %i0, 0x4, %i0
2139 stuh %o2, [%i0]
2143 add %i0, 0x2, %i0
2151 stx %o2, [%i0]
2155 add %i0, 0x8, %i0
2184 stxa %l3, [%i0+0x0]%asi
2185 stxa %l4, [%i0+0x8]%asi
2188 stxa %l5, [%i0+0x10]%asi
2189 stxa %l2, [%i0+0x18]%asi
2192 stxa %l3, [%i0+0x20]%asi
2193 stxa %l4, [%i0+0x28]%asi
2196 stxa %l5, [%i0+0x30]%asi
2197 stxa %l2, [%i0+0x38]%asi
2203 add %i0, 0x40, %i0
2222 stxa %l2, [%i0+0x0]%asi
2223 stxa %l3, [%i0+0x8]%asi
2227 stxa %l4, [%i0+0x10]%asi ! %l4 from previous read
2228 stxa %l5, [%i0+0x18]%asi ! into %l4 and %l5
2234 stxa %l2, [%i0+0x20]%asi
2235 stxa %l3, [%i0+0x28]%asi
2239 stxa %l4, [%i0+0x30]%asi
2240 stxa %l5, [%i0+0x38]%asi
2246 add %i0, 0x40, %i0
2268 stxa %l3, [%i0+0x0]%asi
2269 stxa %l4, [%i0+0x8]%asi
2273 stxa %l5, [%i0+0x10]%asi ! %l5 from previous read
2274 stxa %l2, [%i0+0x18]%asi ! into %l5 and %l2
2280 stxa %l3, [%i0+0x20]%asi
2281 stxa %l4, [%i0+0x28]%asi
2285 stxa %l5, [%i0+0x30]%asi
2286 stxa %l2, [%i0+0x38]%asi
2292 add %i0, 0x40, %i0
2307 stxa %l0, [%i0+0x0]%asi
2311 stxa %l1, [%i0+0x8]%asi
2312 stxa %l2, [%i0+0x10]%asi
2313 stxa %l3, [%i0+0x18]%asi
2314 stxa %l4, [%i0+0x20]%asi
2315 stxa %l5, [%i0+0x28]%asi
2316 stxa %l6, [%i0+0x30]%asi
2317 stxa %l7, [%i0+0x38]%asi
2322 add %i0, 0x40, %i0
2336 or %i1, %i0, %o2
2344 stx %o2, [%i0]
2349 add %i0, 0x8, %i0
2364 st %o2, [%i0]
2369 add %i0, 0x4, %i0
2385 stuh %o2, [%i0]
2390 add %i0, 0x2, %i0
2397 stb %o2, [%i0]
2401 inc %i0
2420 xor %i0, %i1, %o4 ! xor from and to address
2425 xor %i0, %i1, %o4 ! xor from and to address
2428 btst 3, %i0 ! delay slot, from address unaligned?
2435 ! i0 - src address, i1 - dest address, i2 - count
2455 ldub [%i0], %i3 ! read a byte from source address
2456 add %i0, 1, %i0 ! increment source address
2458 btst 3, %i0 ! is source aligned?
2465 ld [%i0], %i3 ! read a word
2466 add %i0, 4, %i0 ! increment source address
2512 ld [%i0], %i4 ! read a word
2513 add %i0, 4, %i0 ! increment source address
2530 ld [%i0], %i3 ! read a source word
2531 add %i0, 4, %i0 ! increment source address
2555 sub %i0, %i1, %i0 ! i0 gets the difference of src and dst
2560 ldub [%i0], %i3 ! read a byte from source address
2561 add %i0, 1, %i0 ! increment source address
2563 btst 3, %i0 ! is source aligned?
2585 sub %i0, %i1, %i0 ! i0 gets the difference of src and dst
2587 ldx [%i0+%i1], %o4 ! read from address
2601 ld [%i0+%i1], %o4 ! read from address
2613 sub %i0, %i1, %i0 ! i0 gets the difference of src and dst
2620 sub %i0, %i1, %i0 ! i0 gets difference of src and dst
2624 ! assumes dest in %i1 and (source - dest) in %i0
2632 ldub [%i0+%i1], %o4 ! read from address
2651 inc %i0 ! inc from
2656 btst %o0, %i0 ! %o0 is bit mask to check for alignment
2658 ldub [%i0], %o4 ! read next byte
2723 ! %i0 - source address (arg)
2733 prefetch [%i0+0x0], #one_read
2734 prefetch [%i0+0x40], #one_read
2736 prefetch [%i0+0x80], #one_read
2737 prefetch [%i0+0xc0], #one_read
2738 ldda [%i0+0x0]%asi, %l0
2739 ldda [%i0+0x10]%asi, %l2
2740 ldda [%i0+0x20]%asi, %l4
2741 ldda [%i0+0x30]%asi, %l6
2750 ldda [%i0+0x40]%asi, %l0
2751 ldda [%i0+0x50]%asi, %l2
2752 ldda [%i0+0x60]%asi, %l4
2753 ldda [%i0+0x70]%asi, %l6
2763 add %i0, 0x80, %i0
3485 prefetch [%i0 + (1 * CACHE_LINE)], #one_read
3498 andcc %i0, 7, %o3 ! is src long word aligned
3500 prefetch [%i0 + (2 * CACHE_LINE)], #one_read
3512 ldx [%i0], %o4
3513 add %i0, 8, %i0 ! increment src ptr
3523 ldx [%i0], %o4
3525 add %i0, 16, %i0 ! increment src ptr
3526 ldx [%i0-8], %o4
3536 andcc %i0, 32, %o3
3538 andcc %i0, 16, %o3
3540 andcc %i0, 8, %o3
3542 prefetch [%i0 + (3 * CACHE_LINE)], #one_read
3544 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3547 prefetch [%i0 + (3 * CACHE_LINE)], #one_read
3549 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3551 andcc %i0, 16, %o3
3553 andcc %i0, 8, %o3
3555 prefetch [%i0 + (3 * CACHE_LINE)], #one_read
3557 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3560 prefetch [%i0 + (3 * CACHE_LINE)], #one_read
3564 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3565 ldd [%i0], %d0
3566 add %i0, 8, %i0
3570 sub %i1, %i0, %i1
3572 ldda [%i0]ASI_BLK_P,%d16 ! block load
3581 stxa %g0,[%i0+%i1]ASI_STBI_AIUS ! block initializing store
3582 stda %d0,[%i0+%i1]ASI_BLK_AIUS
3583 add %i0, 64, %i0
3586 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3587 add %i1, %i0, %i1
3596 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3597 ldd [%i0], %d0
3598 ldd [%i0+8], %d2
3599 add %i0, 16, %i0
3603 sub %i1, %i0, %i1
3605 ldda [%i0]ASI_BLK_P,%d16 ! block load
3613 stxa %g0,[%i0+%i1]ASI_STBI_AIUS ! block initializing store
3614 stda %d0,[%i0+%i1]ASI_BLK_AIUS
3615 add %i0, 64, %i0
3619 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3620 add %i1, %i0, %i1
3630 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3631 ldd [%i0], %d0
3632 ldd [%i0+8], %d2
3633 ldd [%i0+16], %d4
3634 add %i0, 24, %i0
3638 sub %i1, %i0, %i1
3640 ldda [%i0]ASI_BLK_P,%d16 ! block load
3647 stxa %g0,[%i0+%i1]ASI_STBI_AIUS ! block initializing store
3648 stda %d0,[%i0+%i1]ASI_BLK_AIUS
3649 add %i0, 64, %i0
3654 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3655 add %i1, %i0, %i1
3666 ldd [%i0], %d0
3667 ldd [%i0+8], %d2
3668 ldd [%i0+16],%d4
3669 ldd [%i0+24],%d6
3670 add %i0, 32, %i0
3674 sub %i1, %i0, %i1
3676 ldda [%i0]ASI_BLK_P,%d16 ! block load
3682 stxa %g0,[%i0+%i1]ASI_STBI_AIUS ! block initializing store
3683 stda %d0,[%i0+%i1]ASI_BLK_AIUS
3684 add %i0, 64, %i0
3690 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3691 add %i1, %i0, %i1
3703 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3704 ldd [%i0], %d0
3705 ldd [%i0+8], %d2
3706 ldd [%i0+16], %d4
3707 ldd [%i0+24], %d6
3708 ldd [%i0+32], %d8
3709 add %i0, 40, %i0
3713 sub %i1, %i0, %i1
3715 ldda [%i0]ASI_BLK_P,%d16 ! block load
3720 stxa %g0,[%i0+%i1]ASI_STBI_AIUS ! block initializing store
3721 stda %d0,[%i0+%i1]ASI_BLK_AIUS
3722 add %i0, 64, %i0
3729 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3730 add %i1, %i0, %i1
3743 ldd [%i0], %d0
3744 ldd [%i0+8], %d2
3745 ldd [%i0+16], %d4
3746 ldd [%i0+24], %d6
3747 ldd [%i0+32], %d8
3748 ldd [%i0+40], %d10
3749 add %i0, 48, %i0
3753 sub %i1, %i0, %i1
3755 ldda [%i0]ASI_BLK_P,%d16 ! block load
3759 stxa %g0,[%i0+%i1]ASI_STBI_AIUS ! block initializing store
3760 stda %d0,[%i0+%i1]ASI_BLK_AIUS
3761 add %i0, 64, %i0
3769 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3770 add %i1, %i0, %i1
3784 ldd [%i0], %d0
3785 ldd [%i0+8], %d2
3786 ldd [%i0+16], %d4
3787 ldd [%i0+24], %d6
3788 ldd [%i0+32], %d8
3789 ldd [%i0+40], %d10
3790 ldd [%i0+48], %d12
3791 add %i0, 56, %i0
3795 sub %i1, %i0, %i1
3797 ldda [%i0]ASI_BLK_P,%d16 ! block load
3800 stxa %g0,[%i0+%i1]ASI_STBI_AIUS ! block initializing store
3801 stda %d0,[%i0+%i1]ASI_BLK_AIUS
3802 add %i0, 64, %i0
3811 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3812 add %i1, %i0, %i1
3826 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3829 sub %i1, %i0, %i1
3831 ldda [%i0]ASI_BLK_P,%d0
3833 stxa %g0,[%i0+%i1]ASI_STBI_AIUS ! block initializing store
3834 stda %d0,[%i0+%i1]ASI_BLK_AIUS
3835 add %i0, 64, %i0
3837 prefetch [%i0 + (4 * CACHE_LINE)], #one_read
3838 add %i1, %i0, %i1
3847 ldx [%i0], %o4 ! move 32 bytes
3850 ldx [%i0+8], %o4
3852 ldx [%i0+16], %o4
3853 add %i0, 32, %i0 ! increase src ptr by 32
3855 ldx [%i0-8], %o4
3864 ldx [%i0], %o4 ! move 8 bytes
3865 add %i0, 8, %i0 ! increase src ptr by 8
3876 ld [%i0], %o4 ! move 4 bytes
3877 add %i0, 4, %i0 ! increase src ptr by 4
3887 ldub [%i0], %o4 ! move a byte
3888 add %i0, 1, %i0
3895 ldub [%i0], %o4 ! move a half-word (src align unknown)
3896 ldub [%i0+1], %o3
3897 add %i0, 2, %i0
3907 ldub [%i0], %o4 ! move a word (src align unknown)
3908 ldub [%i0+1], %o3
3912 ldub [%i0+2], %o4
3915 ldub [%i0+3], %o4
3918 add %i0, 4, %i0 ! adjust src by 4
3932 andcc %i0, 0x1, %o4
3935 andcc %i0, 2, %o4 ! check for half word alignment
3940 ld [%i0], %o4 ! load 4 bytes
3942 ld [%i0+4], %o4 ! load 4 bytes
3943 add %i0, 8, %i0 ! increase src ptr by 8
3953 lduh [%i0], %o4 ! load 2 bytes
3955 lduw [%i0+2], %o4
3958 lduh [%i0+6], %o4
3961 add %i0, 8, %i0
3970 sub %i1, %i0, %i1 ! share pointer advance
3972 ldub [%i0], %o4
3974 lduh [%i0+1], %o4
3977 lduh [%i0+3], %o4
3980 lduh [%i0+5], %o4
3983 ldub [%i0+7], %o4
3985 stxa %i3, [%i1+%i0]ASI_USER
3988 add %i0, 8, %i0
3989 add %i1,%i0, %i1 ! restore pointer
4262 andn %i0, 0x7, %o4 ! %o4 has long word aligned src address
4263 add %i0, %i3, %i0 ! advance %i0 to after multiple of 8
4279 ldub [%i0], %o4
4281 ldub [%i0+1], %o4
4284 ldub [%i0+2], %o4
4287 ldub [%i0+3], %o4
4290 ldub [%i0+4], %o4
4292 ldub [%i0+5], %o4
4295 ldub [%i0+6], %o4
4298 ldub [%i0+7], %o4
4301 add %i0, 8, %i0
4308 ldub [%i0], %o3 ! read byte
4311 ldub [%i0+1], %o4
4314 ldub [%i0+2], %o4
4318 ldub [%i0+3], %o4
4319 add %i0, 4, %i0 ! advance src by 4
4330 ldub [%i0], %o4 ! load one byte
4333 ldub [%i0+1], %o4 ! load second byte
4337 ldub [%i0+2], %o4 ! load third byte
6159 andn %i0, 0x3f, %o4 ! %o4 has block aligned src address
6161 alignaddr %i0, %g0, %g0 ! generate %gsr
6162 add %i0, %i3, %i0 ! advance %i0 to after blocks
6165 andcc %i0, 0x20, %o3
6167 andcc %i0, 0x10, %o3
6169 andcc %i0, 0x08, %o3
6181 andcc %i0, 0x08, %o3
6188 prefetcha [%i0 + (4 * CACHE_LINE)]%asi, #one_read
7302 ! %i0 - start address
7309 andcc %i0, 0x3f, %g0
7324 mov %i0, %o0
7332 stxa %g0, [%i0+0x0]%asi
7333 stxa %g0, [%i0+0x40]%asi
7334 stxa %g0, [%i0+0x80]%asi
7335 stxa %g0, [%i0+0xc0]%asi
7337 stxa %g0, [%i0+0x8]%asi
7338 stxa %g0, [%i0+0x10]%asi
7339 stxa %g0, [%i0+0x18]%asi
7340 stxa %g0, [%i0+0x20]%asi
7341 stxa %g0, [%i0+0x28]%asi
7342 stxa %g0, [%i0+0x30]%asi
7343 stxa %g0, [%i0+0x38]%asi
7345 stxa %g0, [%i0+0x48]%asi
7346 stxa %g0, [%i0+0x50]%asi
7347 stxa %g0, [%i0+0x58]%asi
7348 stxa %g0, [%i0+0x60]%asi
7349 stxa %g0, [%i0+0x68]%asi
7350 stxa %g0, [%i0+0x70]%asi
7351 stxa %g0, [%i0+0x78]%asi
7353 stxa %g0, [%i0+0x88]%asi
7354 stxa %g0, [%i0+0x90]%asi
7355 stxa %g0, [%i0+0x98]%asi
7356 stxa %g0, [%i0+0xa0]%asi
7357 stxa %g0, [%i0+0xa8]%asi
7358 stxa %g0, [%i0+0xb0]%asi
7359 stxa %g0, [%i0+0xb8]%asi
7361 stxa %g0, [%i0+0xc8]%asi
7362 stxa %g0, [%i0+0xd0]%asi
7363 stxa %g0, [%i0+0xd8]%asi
7364 stxa %g0, [%i0+0xe0]%asi
7365 stxa %g0, [%i0+0xe8]%asi
7366 stxa %g0, [%i0+0xf0]%asi
7367 stxa %g0, [%i0+0xf8]%asi
7372 add %i0, 0x100, %i0
7381 stxa %g0, [%i0+0x0]%asi
7382 stxa %g0, [%i0+0x8]%asi
7383 stxa %g0, [%i0+0x10]%asi
7384 stxa %g0, [%i0+0x18]%asi
7385 stxa %g0, [%i0+0x20]%asi
7386 stxa %g0, [%i0+0x28]%asi
7387 stxa %g0, [%i0+0x30]%asi
7388 stxa %g0, [%i0+0x38]%asi
7392 add %i0, 0x40, %i0