Lines Matching defs:sbus_soft_state
253 struct sbus_soft_state { struct
254 dev_info_t *dip; /* dev info of myself */
255 int upa_id; /* UPA ID of this SYSIO */
260 caddr_t address;
265 ddi_acc_handle_t ac;
267 volatile uint64_t *iommu_flush_reg; /* IOMMU regs */
268 volatile uint64_t *iommu_ctrl_reg;
269 volatile uint64_t *tsb_base_addr; /* Hardware reg for phys TSB base */
270 volatile uint64_t *soft_tsb_base_addr; /* virtual address of TSB base */
271 volatile uint64_t *iommu_tlb_tag;
272 volatile uint64_t *iommu_tlb_data;
274 size_t iommu_dvma_size;
275 ioaddr_t iommu_dvma_base;
276 uint16_t iommu_tsb_cookie;
279 volatile uint64_t *sysio_ctrl_reg; /* sysio regs */
280 volatile uint64_t *sbus_ctrl_reg; /* also used to flush store bufs */
281 volatile uint64_t *sbus_slot_config_reg;
282 uint_t sbus_slave_burstsizes[MAX_SBUS_SLOTS];
284 volatile uint64_t *intr_mapping_reg; /* Interrupt regs */
285 volatile uint64_t *clr_intr_reg;
286 volatile uint64_t *intr_retry_reg;
287 volatile uint64_t *sbus_intr_state;
288 volatile uint64_t *obio_intr_state;
289 int8_t intr_hndlr_cnt[MAX_SBUS_SLOT_ADDR]; /* intmapreg cntr by slot */
290 uchar_t spurious_cntrs[MAX_PIL + 1]; /* Spurious intr counter */
292 volatile uint64_t *sysio_ecc_reg; /* sysio ecc control reg */
293 volatile uint64_t *sysio_ue_reg; /* sysio ue ecc error regs */
294 volatile uint64_t *sysio_ce_reg; /* sysio ce ecc error regs */
295 volatile uint64_t *sbus_err_reg; /* sbus async error regs */
297 volatile uint64_t *str_buf_ctrl_reg; /* streaming buffer regs */
298 volatile uint64_t *str_buf_flush_reg;
299 volatile uint64_t *str_buf_sync_reg;
300 volatile uint64_t *str_buf_pg_tag_diag;
301 kmutex_t sync_reg_lock; /* lock around sync flush reg */
302 int stream_buf_off;
304 uint_t sbus_burst_sizes;
305 uint_t sbus64_burst_sizes;
307 vmem_t *dvma_arena; /* DVMA arena for this IOMMU */
308 uintptr_t dvma_call_list_id; /* DVMA callback list */
309 kmutex_t dma_pool_lock;
310 caddr_t dmaimplbase; /* dma_pool_lock protects this */
311 int dma_reserve; /* Size reserved for fast DVMA */
313 struct sbus_wrapper_arg *intr_list[MAX_INO_TABLE_SIZE];
314 kmutex_t intr_poll_list_lock; /* to add/rem to intr poll list */
315 kmutex_t pokefault_mutex; /* mutex for pokefaults */
316 on_trap_data_t *ontrap_data; /* Data used to handle poke faults */
317 hrtime_t bto_timestamp; /* time of first timeout */
318 int bto_ctr; /* counter for timeouts thereafter */
319 pfn_t sbus_io_lo_pfn;
320 pfn_t sbus_io_hi_pfn;
321 struct iophyslist *sbus_io_ranges;
322 int intr_mapping_ign; /* placeholder for the IGN */
324 kmutex_t iomemlock; /* Memory usage lock (debug only) */
325 struct io_mem_list *iomem; /* Memory usage list (debug only) */
330 volatile uint64_t *sbus_pcr; /* perf counter control */
331 volatile uint64_t *sbus_pic; /* perf counter register */
332 kstat_t *sbus_counters_ksp; /* perf counter kstat */