125 struct iommu {  struct
127 	pci_t *iommu_pci_p;	/* link back to pci soft state */  argument
128 	int iommu_inst;		/* ddi_get_instance(iommu_pci_p->pci_dip) */  argument
130 	volatile uint64_t *iommu_ctrl_reg;  argument
131 	volatile uint64_t *iommu_tsb_base_addr_reg;  argument
132 	volatile uint64_t *iommu_flush_page_reg;  argument
133 	volatile uint64_t *iommu_flush_ctx_reg;	/* schizo only */  argument
134 	volatile uint64_t *iommu_tfar_reg; /* tomatillo only */  argument
139 	uint64_t *iommu_tsb_vaddr;  argument
140 	uint64_t iommu_tsb_paddr;  argument
141 	uint_t iommu_tsb_entries;  argument
142 	uint_t iommu_tsb_size;  argument
147 	dvma_addr_t iommu_dvma_base;  argument
148 	dvma_addr_t iommu_dvma_end;  argument
149 	dvma_addr_t iommu_dvma_fast_end;  argument
150 	dvma_addr_t dvma_base_pg;	/* = IOMMU_BTOP(iommu_dvma_base) */  argument
151 	dvma_addr_t dvma_end_pg;	/* = IOMMU_BTOP(iommu_dvma_end) */  argument
156 	dma_bypass_addr_t iommu_dma_bypass_base;  argument
157 	dma_bypass_addr_t iommu_dma_bypass_end;  argument
162 	vmem_t *iommu_dvma_map;  argument
163 	uintptr_t iommu_dvma_clid;  argument
168 	ulong_t iommu_dvma_reserve;  argument
173 	uint8_t *iommu_dvma_cache_locks;  argument
174 	uint_t iommu_dvma_addr_scan_start;  argument
179 	uint64_t *iommu_ctx_bitmap;  argument
196 	dvma_unbind_req_t *iommu_mtlb_req_p;	/* unbind requests */  argument
197 	uint32_t	iommu_mtlb_maxpgs;	/* GC threshold */  argument
198 	uint32_t	iommu_mtlb_npgs;	/* total page count */  argument
199 	uint32_t	iommu_mtlb_nreq;	/* total request count */  argument
200 	kmutex_t	iommu_mtlb_lock;  argument