Lines Matching refs:g5
59 ! g5 = mmu trap type, g6 = tag access reg (g5 != T_ALIGNMENT) or
60 ! sfar (g5 == T_ALIGNMENT)
76 cmp %g5, T_ALIGNMENT
87 rdpr %tstate, %g5
88 and %g5, TSTATE_CWP, %g5
90 wrpr %g0, %g5, %cwp
155 FAULT_WINTRACE(%g5, %g6, %g7, TT_F32_SO1)
156 CPU_ADDR(%g5, %g6)
160 ldn [%g5 + CPU_MPCB], %g6
161 ld [%g6 + MPCB_WBCNT], %g5
162 add %g5, 1, %g7
167 sll %g5, CPTRSHIFT, %g7 ! spbuf size is sizeof (caddr_t)
170 sll %g5, RWIN32SHIFT, %g7
171 ldn [%g6 + MPCB_WBUF], %g5
172 add %g5, %g7, %g7
175 set sys_trap, %g5
176 wrpr %g5, %tnpc
193 ! g5 = mmu trap type, g6 = tag access reg (g5 != T_ALIGNMENT) or
194 ! sfar (g5 == T_ALIGNMENT)
209 mov %g5, %g3 ! arg3 = traptype
210 cmp %g5, T_ALIGNMENT
221 rdpr %tstate, %g5
222 and %g5, TSTATE_CWP, %g5
224 wrpr %g0, %g5, %cwp
289 FAULT_WINTRACE(%g5, %g6, %g7, TT_F64_SO1)
290 CPU_ADDR(%g5, %g6)
294 ldn [%g5 + CPU_MPCB], %g6
295 ld [%g6 + MPCB_WBCNT], %g5
296 add %g5, 1, %g7
301 sll %g5, CPTRSHIFT, %g7 ! spbuf size is sizeof (caddr_t)
304 sll %g5, RWIN64SHIFT, %g7
305 ldn [%g6 + MPCB_WBUF], %g5
306 add %g5, %g7, %g7
309 set sys_trap, %g5
310 wrpr %g5, %tnpc
334 ! g5 = mmu trap type, g6 = tag access reg (g5 != T_ALIGNMENT) or
335 ! sfar (g5 == T_ALIGNMENT)
340 cmp %g5, T_ALIGNMENT
351 rdpr %tstate, %g5
352 and %g5, TSTATE_CWP, %g5
354 wrpr %g0, %g5, %cwp
412 sethi %hi(kcontextreg), %g5 ! mov KCONTEXT, %g5
413 ldx [%g5 + %lo(kcontextreg)], %g5
416 xor %g5, %g7, %g7
424 stxa %g5, [%g6]ASI_MMU_CTX
425 sethi %hi(FLUSH_ADDR), %g5
426 flush %g5