Lines Matching +full:open +full:- +full:pic
174 * from 1 - 15, so we'll pattern the priorities after the 4M. We map Fusion
179 -1, 2, 3, 5, 7, 9, 11, 13, /* Slot 0 sbus level 1 - 7 */
180 -1, 2, 3, 5, 7, 9, 11, 13, /* Slot 1 sbus level 1 - 7 */
181 -1, 2, 3, 5, 7, 9, 11, 13, /* Slot 2 sbus level 1 - 7 */
182 -1, 2, 3, 5, 7, 9, 11, 13, /* Slot 3 sbus level 1 - 7 */
186 -1, /* Not in use */
188 -1, -1, -1, /* Not in use */
192 -1, -1, -1, /* Not is use */
327 nodev, /* open */
367 static kmutex_t sbus_attachcnt_mutex; /* sbus_attachcnt lock - attach/detach */
467 softsp->intr_mapping_reg, 0); in sbus_attach()
483 softsp->dip = devi; in sbus_attach()
485 if ((softsp->upa_id = (int)ddi_getprop(DDI_DEV_T_ANY, softsp->dip, in sbus_attach()
486 DDI_PROP_DONTPASS, "upa-portid", -1)) == -1) { in sbus_attach()
487 cmn_err(CE_WARN, "Unable to retrieve sbus upa-portid" in sbus_attach()
495 * device registers and exports the mapping in the int-sized in sbus_attach()
515 if (ddi_regs_map_setup(softsp->dip, 0, &softsp->address, 0, 0, in sbus_attach()
516 &attr, &softsp->ac) != DDI_SUCCESS) { in sbus_attach()
518 ddi_get_name(softsp->dip), in sbus_attach()
519 ddi_get_instance(softsp->dip)); in sbus_attach()
522 if (softsp->address == (caddr_t)-1) { in sbus_attach()
524 ddi_get_instance(softsp->dip)); in sbus_attach()
534 * the #size-cells infrastructure code works, to some degree. in sbus_attach()
545 if ((rv = ddi_map_regs(softsp->dip, 0, &addr, in sbus_attach()
556 if ((error = iommu_init(softsp, softsp->address)) != DDI_SUCCESS) in sbus_attach()
559 if ((error = sbus_init(softsp, softsp->address)) != DDI_SUCCESS) in sbus_attach()
562 if ((error = sysio_err_init(softsp, softsp->address)) != DDI_SUCCESS) in sbus_attach()
565 if ((error = stream_buf_init(softsp, softsp->address)) != DDI_SUCCESS) in sbus_attach()
569 mutex_init(&softsp->pokefault_mutex, NULL, MUTEX_SPIN, in sbus_attach()
570 (void *)ipltospl(SBUS_ERR_PIL - 1)); in sbus_attach()
614 softsp->intr_mapping_reg, 1); in sbus_detach()
627 int instance, pic; in sbus_do_detach() local
654 if (softsp->ac) { in sbus_do_detach()
655 ddi_regs_map_free(&softsp->ac); in sbus_do_detach()
656 softsp->address = NULL; in sbus_do_detach()
662 if (softsp->sbus_counters_ksp != (kstat_t *)NULL) in sbus_do_detach()
663 kstat_delete(softsp->sbus_counters_ksp); in sbus_do_detach()
672 sbus_attachcnt --; in sbus_do_detach()
674 for (pic = 0; pic < SBUS_NUM_PICS; pic++) { in sbus_do_detach()
675 if (sbus_picN_ksp[pic] != (kstat_t *)NULL) { in sbus_do_detach()
676 kstat_delete(sbus_picN_ksp[pic]); in sbus_do_detach()
677 sbus_picN_ksp[pic] = NULL; in sbus_do_detach()
709 softsp->sysio_ctrl_reg = REG_ADDR(address, OFF_SYSIO_CTRL_REG); in sbus_init()
710 softsp->sbus_ctrl_reg = REG_ADDR(address, OFF_SBUS_CTRL_REG); in sbus_init()
711 softsp->sbus_slot_config_reg = REG_ADDR(address, OFF_SBUS_SLOT_CONFIG); in sbus_init()
712 softsp->intr_mapping_reg = REG_ADDR(address, OFF_INTR_MAPPING_REG); in sbus_init()
713 softsp->clr_intr_reg = REG_ADDR(address, OFF_CLR_INTR_REG); in sbus_init()
714 softsp->intr_retry_reg = REG_ADDR(address, OFF_INTR_RETRY_REG); in sbus_init()
715 softsp->sbus_intr_state = REG_ADDR(address, OFF_SBUS_INTR_STATE_REG); in sbus_init()
716 softsp->sbus_pcr = REG_ADDR(address, OFF_SBUS_PCR); in sbus_init()
717 softsp->sbus_pic = REG_ADDR(address, OFF_SBUS_PIC); in sbus_init()
722 "SBUS Control reg: 0x%p", (void *)softsp->sysio_ctrl_reg, in sbus_init()
723 (void *)softsp->sbus_ctrl_reg)); in sbus_init()
725 softsp->intr_mapping_ign = in sbus_init()
726 UPAID_TO_IGN(softsp->upa_id) << IMR_IGN_SHIFT; in sbus_init()
729 softsp->obio_intr_state = softsp->sbus_intr_state + 1; in sbus_init()
738 softsp->sbus_slave_burstsizes[i] = 0xffffffffu; in sbus_init()
750 * #upa-interrupt-proxies property defines how many UPA interrupt in sbus_init()
754 numproxy = ddi_prop_get_int(DDI_DEV_T_ANY, softsp->dip, in sbus_init()
755 DDI_PROP_DONTPASS, "#upa-interrupt-proxies", 1); in sbus_init()
758 set_intr_mapping_reg(softsp->upa_id, in sbus_init()
759 (uint64_t *)(softsp->intr_mapping_reg + in sbus_init()
763 set_intr_mapping_reg(softsp->upa_id, in sbus_init()
764 (uint64_t *)(softsp->intr_mapping_reg + in sbus_init()
796 *softsp->sysio_ctrl_reg |= in sbus_resume_init()
797 (uint64_t)softsp->upa_id << 51; in sbus_resume_init()
800 *softsp->sysio_ctrl_reg |= in sbus_resume_init()
801 (uint64_t)softsp->upa_id << SYSIO_IGN; in sbus_resume_init()
807 *softsp->sbus_ctrl_reg |= SBUS_ARBIT_ALL; in sbus_resume_init()
813 sbus_burst_sizes = ddi_getprop(DDI_DEV_T_ANY, softsp->dip, in sbus_resume_init()
814 DDI_PROP_DONTPASS, "up-burst-sizes", sbus_burst_sizes); in sbus_resume_init()
816 softsp->sbus_burst_sizes = sbus_burst_sizes & SYSIO_BURST_MASK; in sbus_resume_init()
817 softsp->sbus64_burst_sizes = sbus_burst_sizes & SYSIO64_BURST_MASK; in sbus_resume_init()
825 config = softsp->sbus_slot_config_reg + i; in sbus_resume_init()
832 tmpreg = *softsp->sbus_ctrl_reg; in sbus_resume_init()
848 if (softsp->sbus_slave_burstsizes[i] != 0xffffffffu) { in sbus_resume_init()
849 config = softsp->sbus_slot_config_reg + i; in sbus_resume_init()
851 if (softsp->sbus_slave_burstsizes[i] & in sbus_resume_init()
855 softsp->sbus_slave_burstsizes[i] >> in sbus_resume_init()
862 softsp->sbus_slave_burstsizes[i] & in sbus_resume_init()
874 tmpreg = *softsp->sbus_ctrl_reg; in sbus_resume_init()
904 * On pre-fusion machines, the "intr" property was the IPL for the system.
911 * n-tuples that describes the interrupt capabilities of the bus the device
914 * <SBus-level>*1
944 * (non-pseudo) device node. "registers" is a s/w only property, so in make_sbus_ppd()
954 pdptr->slot = (uint_t)-1; in make_sbus_ppd()
956 pdptr->slot = ((struct regspec *)reg_prop)->regspec_bustype; in make_sbus_ppd()
957 pdptr->offset = ((struct regspec *)reg_prop)->regspec_addr; in make_sbus_ppd()
971 uint_t slot = rp->regspec_bustype; in make_sbus_ppd()
977 rp->regspec_bustype = slot; in make_sbus_ppd()
987 pdptr->par_nreg = reg_len / (int)sizeof (struct regspec); in make_sbus_ppd()
988 pdptr->par_reg = (struct regspec *)reg_prop; in make_sbus_ppd()
996 pdptr->par_nrng = rng_len / (int)(sizeof (struct rangespec)); in make_sbus_ppd()
997 pdptr->par_rng = (struct rangespec *)rng_prop; in make_sbus_ppd()
1018 DDI_PROP_DONTPASS | DDI_PROP_CANSLEEP, "slot", -1); in sbusmem_initchild()
1019 if (slot == -1) { in sbusmem_initchild()
1031 if (rp->rng_cbustype == (uint_t)slot) { in sbusmem_initchild()
1038 r.regspec_size = rp->rng_size; in sbusmem_initchild()
1045 size = rp->rng_size; in sbusmem_initchild()
1068 * Fill in parent-private data in sysio_name_child()
1079 if (sysio_pd_getslot(child) != (uint_t)-1) { in sysio_name_child()
1098 * intr old-form interrupt spec
1099 * interrupts new (bus-oriented) interrupt spec
1165 slot = (slot > 3) ? slot - 9 : slot; in sbus_initchild()
1168 slot_reg = softsp->sbus_slot_config_reg + slot; in sbus_initchild()
1173 * The upper 16 bits of the slave-burst-sizes are for 64 bit sbus in sbus_initchild()
1178 * For older devices, make sure we check the "burst-sizes" property in sbus_initchild()
1182 DDI_PROP_DONTPASS, "slave-burst-sizes", 0)) != 0 || in sbus_initchild()
1184 DDI_PROP_DONTPASS, "burst-sizes", 0)) != 0) { in sbus_initchild()
1191 if (((softsp->sbus_slave_burstsizes[slot] & in sbus_initchild()
1193 ((softsp->sbus_slave_burstsizes[slot] & 0xffff) != 0)) { in sbus_initchild()
1198 * If "slave-burst-sizes was defined but we have 0 at this in sbus_initchild()
1211 softsp->sbus_slave_burstsizes[slot] &= in sbus_initchild()
1218 if (softsp->sbus_slave_burstsizes[slot] & in sbus_initchild()
1221 burstsizes = softsp->sbus_slave_burstsizes[slot] >> in sbus_initchild()
1231 if (softsp->sbus_slave_burstsizes[slot] & in sbus_initchild()
1234 softsp->sbus_slave_burstsizes[slot] & in sbus_initchild()
1265 if ((n = (size_t)pdptr->par_nrng) != 0) in sbus_uninitchild()
1266 kmem_free(pdptr->par_rng, n * in sbus_uninitchild()
1269 if ((n = pdptr->par_nreg) != 0) in sbus_uninitchild()
1270 kmem_free(pdptr->par_reg, n * sizeof (struct regspec)); in sbus_uninitchild()
1297 if (in_args->handle != NULL) in sbus_ctlops_poke()
1300 mutex_enter(&softsp->pokefault_mutex); in sbus_ctlops_poke()
1301 softsp->ontrap_data = &otd; in sbus_ctlops_poke()
1308 err = do_poke(in_args->size, (void *)in_args->dev_addr, in sbus_ctlops_poke()
1309 (void *)in_args->host_addr); in sbus_ctlops_poke()
1315 tmpreg = *softsp->sbus_ctrl_reg; in sbus_ctlops_poke()
1323 tmpreg = *softsp->sbus_err_reg; in sbus_ctlops_poke()
1325 tmpreg = *softsp->sbus_err_reg; in sbus_ctlops_poke()
1330 softsp->ontrap_data = NULL; in sbus_ctlops_poke()
1331 mutex_exit(&softsp->pokefault_mutex); in sbus_ctlops_poke()
1349 if (in_args->handle != NULL) in sbus_ctlops_peek()
1356 err = do_peek(in_args->size, (void *)in_args->dev_addr, in sbus_ctlops_peek()
1357 (void *)in_args->host_addr); in sbus_ctlops_peek()
1359 result = (void *)in_args->host_addr; in sbus_ctlops_peek()
1397 (1 << (ddi_fls(softsp->sbus_burst_sizes) - 1))); in sbus_ctlops()
1400 (1 << (ddi_ffs(softsp->sbus_burst_sizes) - 1))); in sbus_ctlops()
1440 REPORTDEV_BUFSIZE - len, " and "); in sbus_ctlops()
1444 f_len += snprintf(msgbuf + len, REPORTDEV_BUFSIZE - len, in sbus_ctlops()
1446 rp->regspec_bustype, rp->regspec_addr); in sbus_ctlops()
1455 REPORTDEV_BUFSIZE - len, ","); in sbus_ctlops()
1463 &pri, softsp->intr_mapping_ign); in sbus_ctlops()
1467 REPORTDEV_BUFSIZE - len, in sbus_ctlops()
1471 REPORTDEV_BUFSIZE - len, " SBus level %d ", in sbus_ctlops()
1475 f_len += snprintf(msgbuf + len, REPORTDEV_BUFSIZE - len, in sbus_ctlops()
1533 int slot = -1; in find_sbus_slot()
1573 spurious_cntr = &intr_info->softsp->spurious_cntrs[intr_info->pil]; in sbus_intr_wrapper()
1574 intr_handler = intr_info->handler_list; in sbus_intr_wrapper()
1577 caddr_t arg1 = intr_handler->arg1; in sbus_intr_wrapper()
1578 caddr_t arg2 = intr_handler->arg2; in sbus_intr_wrapper()
1579 uint_t (*funcp)() = intr_handler->funcp; in sbus_intr_wrapper()
1580 dev_info_t *dip = intr_handler->dip; in sbus_intr_wrapper()
1583 if (intr_handler->intr_state == SBUS_INTR_STATE_DISABLE) { in sbus_intr_wrapper()
1584 intr_handler = intr_handler->next; in sbus_intr_wrapper()
1597 intr_handler = intr_handler->next; in sbus_intr_wrapper()
1601 tmpreg = *intr_info->softsp->sbus_ctrl_reg; in sbus_intr_wrapper()
1603 *intr_info->clear_reg = tmpreg; in sbus_intr_wrapper()
1604 tmpreg = *intr_info->softsp->sbus_ctrl_reg; in sbus_intr_wrapper()
1614 else if (intr_info->pil >= LOCK_LEVEL) { in sbus_intr_wrapper()
1617 intr_info->pil); in sbus_intr_wrapper()
1634 * add_intrspec - Add an interrupt specification.
1665 "for device %s%d\n", hdlp->ih_vector, ddi_driver_name(rdip), in sbus_add_intr_impl()
1669 if (sbus_xlate_intrs(dip, rdip, (uint32_t *)&hdlp->ih_vector, in sbus_add_intr_impl()
1670 &hdlp->ih_pri, softsp->intr_mapping_ign) == DDI_FAILURE) { in sbus_add_intr_impl()
1677 ino = hdlp->ih_vector & SBUS_MAX_INO; in sbus_add_intr_impl()
1678 mondo_vec_reg = (softsp->intr_mapping_reg + in sbus_add_intr_impl()
1679 ino_table[ino]->mapping_reg); in sbus_add_intr_impl()
1687 start_bit = ino_table[ino]->diagreg_shift; in sbus_add_intr_impl()
1688 intr_state_reg = softsp->obio_intr_state; in sbus_add_intr_impl()
1691 intr_state_reg = softsp->sbus_intr_state; in sbus_add_intr_impl()
1697 intr_handler->dip = rdip; in sbus_add_intr_impl()
1698 intr_handler->funcp = hdlp->ih_cb_func; in sbus_add_intr_impl()
1699 intr_handler->arg1 = hdlp->ih_cb_arg1; in sbus_add_intr_impl()
1700 intr_handler->arg2 = hdlp->ih_cb_arg2; in sbus_add_intr_impl()
1701 intr_handler->inum = hdlp->ih_inum; in sbus_add_intr_impl()
1704 "intr_handler 0x%p\n", hdlp->ih_vector, (void *)intr_handler)); in sbus_add_intr_impl()
1709 mutex_enter(&softsp->intr_poll_list_lock); in sbus_add_intr_impl()
1711 sbus_arg = softsp->intr_list[ino]; in sbus_add_intr_impl()
1718 tmpreg = *softsp->sbus_ctrl_reg; in sbus_add_intr_impl()
1728 * 0 - idle, 1 - transmit, 3 - pending. in sbus_add_intr_impl()
1734 intr_handler->next = sbus_arg->handler_list; in sbus_add_intr_impl()
1735 sbus_arg->handler_list = intr_handler; in sbus_add_intr_impl()
1742 softsp->intr_list[ino] = sbus_arg; in sbus_add_intr_impl()
1743 sbus_arg->clear_reg = (softsp->clr_intr_reg + in sbus_add_intr_impl()
1744 ino_table[ino]->clear_reg); in sbus_add_intr_impl()
1746 "clear reg: 0x%p\n", ino, (void *)sbus_arg->clear_reg)); in sbus_add_intr_impl()
1747 sbus_arg->softsp = softsp; in sbus_add_intr_impl()
1748 sbus_arg->handler_list = intr_handler; in sbus_add_intr_impl()
1767 DDI_INTR_ASSIGN_HDLR_N_ARGS(hdlp, intr_handler->funcp, in sbus_add_intr_impl()
1768 intr_handler->arg1, intr_handler->arg2); in sbus_add_intr_impl()
1771 mutex_exit(&softsp->intr_poll_list_lock); in sbus_add_intr_impl()
1776 (softsp->intr_hndlr_cnt[slot] == 0)) { in sbus_add_intr_impl()
1797 sbus_arg->pil = hdlp->ih_pri; in sbus_add_intr_impl()
1803 softsp->intr_hndlr_cnt[slot]++; in sbus_add_intr_impl()
1805 mutex_exit(&softsp->intr_poll_list_lock); in sbus_add_intr_impl()
1818 softsp->intr_hndlr_cnt[slot])); in sbus_add_intr_impl()
1823 *sbus_arg->clear_reg = tmpreg; in sbus_add_intr_impl()
1830 tmpreg = *softsp->sbus_ctrl_reg; in sbus_add_intr_impl()
1844 listp = sbus_arg->handler_list; in sbus_free_handler()
1847 if (listp->dip == dip && listp->inum == inum) { in sbus_free_handler()
1849 prevp->next = listp->next; in sbus_free_handler()
1851 prevp = listp->next; in sbus_free_handler()
1852 sbus_arg->handler_list = prevp; in sbus_free_handler()
1860 listp = listp->next; in sbus_free_handler()
1866 * remove_intrspec - Remove an interrupt specification.
1884 mutex_enter(&softsp->intr_poll_list_lock); in sbus_remove_intr_impl()
1887 if (sbus_xlate_intrs(dip, rdip, (uint32_t *)&hdlp->ih_vector, in sbus_remove_intr_impl()
1888 &hdlp->ih_pri, softsp->intr_mapping_ign) == DDI_FAILURE) { in sbus_remove_intr_impl()
1894 ino = ((int32_t)hdlp->ih_vector) & SBUS_MAX_INO; in sbus_remove_intr_impl()
1896 mondo_vec_reg = (softsp->intr_mapping_reg + in sbus_remove_intr_impl()
1897 ino_table[ino]->mapping_reg); in sbus_remove_intr_impl()
1902 tmpreg = *softsp->sbus_ctrl_reg; in sbus_remove_intr_impl()
1907 start_bit = ino_table[ino]->diagreg_shift; in sbus_remove_intr_impl()
1908 intr_state_reg = softsp->obio_intr_state; in sbus_remove_intr_impl()
1911 intr_state_reg = softsp->sbus_intr_state; in sbus_remove_intr_impl()
1925 sbus_arg = softsp->intr_list[ino]; in sbus_remove_intr_impl()
1928 softsp->intr_hndlr_cnt[slot]--; in sbus_remove_intr_impl()
1932 hdlp->ih_vector, ino, (void *)sbus_arg, in sbus_remove_intr_impl()
1933 softsp->intr_hndlr_cnt[slot])); in sbus_remove_intr_impl()
1936 ASSERT(sbus_arg->handler_list != NULL); in sbus_remove_intr_impl()
1937 sbus_free_handler(rdip, hdlp->ih_inum, sbus_arg); in sbus_remove_intr_impl()
1940 if (sbus_arg->handler_list == NULL) in sbus_remove_intr_impl()
1947 if (softsp->intr_hndlr_cnt[slot] > 0) { in sbus_remove_intr_impl()
1950 tmpreg = *softsp->sbus_ctrl_reg; in sbus_remove_intr_impl()
1954 if ((softsp->intr_hndlr_cnt[slot] == 0) || (slot >= EXT_SBUS_SLOTS)) { in sbus_remove_intr_impl()
1955 ASSERT(sbus_arg->handler_list == NULL); in sbus_remove_intr_impl()
1960 if (sbus_arg->handler_list == NULL) { in sbus_remove_intr_impl()
1964 softsp->intr_list[ino] = NULL; in sbus_remove_intr_impl()
1968 mutex_exit(&softsp->intr_poll_list_lock); in sbus_remove_intr_impl()
1974 * with on-board devices and we have an interrupt_number property which
1997 if ((slot = find_sbus_slot(dip, rdip)) == -1) { in sbus_xlate_intrs()
2031 if ((ino_table[ino]->clear_reg == PP_CLEAR) && in sbus_xlate_intrs()
2067 *(int *)result = hdlp->ih_scratch1; in sbus_intr_ops()
2072 if (hdlp->ih_pri == 0) { in sbus_intr_ops()
2075 (uint32_t *)&hdlp->ih_vector, &hdlp->ih_pri, in sbus_intr_ops()
2076 softsp->intr_mapping_ign); in sbus_intr_ops()
2079 *(int *)result = hdlp->ih_pri; in sbus_intr_ops()
2134 mondo_vec_reg = baddr + ino_table[i]->mapping_reg; in sbus_cpr_handle_intr_map_reg()
2180 mondo_vec_reg = (softsp->intr_mapping_reg + in sbus_intrdist()
2181 ino_table[mondo]->mapping_reg); in sbus_intrdist()
2203 tmpreg = *softsp->sbus_ctrl_reg; in sbus_intrdist()
2210 start_bit = ino_table[mondo]->diagreg_shift; in sbus_intrdist()
2211 intr_state_reg = softsp->obio_intr_state; in sbus_intrdist()
2225 * bits per slot, bits 0-1 of each slot are reserved. in sbus_intrdist()
2228 intr_state_reg = softsp->sbus_intr_state; in sbus_intrdist()
2231 * Make sure interrupts for levels 1-7 of this slot in sbus_intrdist()
2252 /* re-target the mondo and turn it on */ in sbus_intrdist()
2287 ino_table[mondo]->clear_reg == 0) { in sbus_intr_reset()
2291 mondo_clear_reg = (softsp->clr_intr_reg + in sbus_intr_reset()
2292 ino_table[mondo]->clear_reg); in sbus_intr_reset()
2300 * called from sbus_add_kstats() to create a kstat for each %pic
2301 * that the SBUS supports. These (read-only) kstats export the
2302 * event names that each %pic supports.
2313 * set to ddi_get_instance(softsp->dip).
2326 * We declare an array of event-names and event-masks. in sbus_add_picN_kstats()
2340 * We declare an array of clear masks for each pic. in sbus_add_picN_kstats()
2342 * each pic. in sbus_add_picN_kstats()
2352 int event, pic; in sbus_add_picN_kstats() local
2357 for (pic = 0; pic < SBUS_NUM_PICS; pic++) { in sbus_add_picN_kstats()
2362 (void) sprintf(pic_name, "pic%d", pic); /* pic0, pic1 ... */ in sbus_add_picN_kstats()
2363 if ((sbus_picN_ksp[pic] = kstat_create("sbus", in sbus_add_picN_kstats()
2370 if (pic == 1) { in sbus_add_picN_kstats()
2378 (struct kstat_named *)(sbus_picN_ksp[pic]->ks_data); in sbus_add_picN_kstats()
2384 if (pic == 1) in sbus_add_picN_kstats()
2397 /* event-name */ in sbus_add_picN_kstats()
2409 sbus_clear_pic[pic].pcr_mask; in sbus_add_picN_kstats()
2411 /* event-name */ in sbus_add_picN_kstats()
2413 sbus_clear_pic[pic].event_name, in sbus_add_picN_kstats()
2416 kstat_install(sbus_picN_ksp[pic]); in sbus_add_picN_kstats()
2434 sbus_add_picN_kstats(softsp->dip); in sbus_add_kstats()
2441 * instance that provides access to the %pcr and %pic in sbus_add_kstats()
2447 ddi_get_instance(softsp->dip), "counters", in sbus_add_kstats()
2451 " failed", ddi_get_instance(softsp->dip)); in sbus_add_kstats()
2456 (struct kstat_named *)(sbus_counters_ksp->ks_data); in sbus_add_kstats()
2468 sbus_counters_ksp->ks_update = sbus_counters_kstat_update; in sbus_add_kstats()
2469 sbus_counters_ksp->ks_private = (void *)softsp; in sbus_add_kstats()
2474 softsp->sbus_counters_ksp = sbus_counters_ksp; in sbus_add_kstats()
2484 sbus_counters_data = (struct kstat_named *)ksp->ks_data; in sbus_counters_kstat_update()
2485 softsp = (struct sbus_soft_state *)ksp->ks_private; in sbus_counters_kstat_update()
2490 * Write the pcr value to the softsp->sbus_pcr. in sbus_counters_kstat_update()
2491 * The pic register is read-only so we don't in sbus_counters_kstat_update()
2495 *softsp->sbus_pcr = in sbus_counters_kstat_update()
2500 * Read %pcr and %pic register values and write them in sbus_counters_kstat_update()
2508 sbus_counters_data[0].value.ui64 = *softsp->sbus_pcr >> 4; in sbus_counters_kstat_update()
2510 pic_register = *softsp->sbus_pic; in sbus_counters_kstat_update()
2512 * sbus pic register: in sbus_counters_kstat_update()
2538 if (sbus_xlate_intrs(dip, rdip, (uint32_t *)&hdlp->ih_vector, in sbus_update_intr_state()
2539 &hdlp->ih_pri, softsp->intr_mapping_ign) == DDI_FAILURE) { in sbus_update_intr_state()
2545 ino = ((int32_t)hdlp->ih_vector) & SBUS_MAX_INO; in sbus_update_intr_state()
2546 sbus_arg = softsp->intr_list[ino]; in sbus_update_intr_state()
2549 ASSERT(sbus_arg->handler_list != NULL); in sbus_update_intr_state()
2550 intr_handler = sbus_arg->handler_list; in sbus_update_intr_state()
2553 if ((intr_handler->inum == hdlp->ih_inum) && in sbus_update_intr_state()
2554 (intr_handler->dip == rdip)) { in sbus_update_intr_state()
2555 intr_handler->intr_state = new_intr_state; in sbus_update_intr_state()
2559 intr_handler = intr_handler->next; in sbus_update_intr_state()