123 #define	JBC_BIT_DESC(bit, hdl, erpt) \  argument
124 	JBC_INTERRUPT_STATUS_ ## bit ## _P, \
128 	PX_ERR_JBC_CLASS(bit) }, \
129 	{ JBC_INTERRUPT_STATUS_ ## bit ## _S, \
133 	PX_ERR_JBC_CLASS(bit)
191 #define	UBC_BIT_DESC(bit, hdl, erpt) \  argument
192 	UBC_INTERRUPT_STATUS_ ## bit ## _P, \
196 	PX_ERR_UBC_CLASS(bit) }, \
197 	{ UBC_INTERRUPT_STATUS_ ## bit ## _S, \
201 	PX_ERR_UBC_CLASS(bit)
232 #define	IMU_BIT_DESC(bit, hdl, erpt) \  argument
233 	IMU_INTERRUPT_STATUS_ ## bit ## _P, \
237 	PX_ERR_DMC_CLASS(bit) }, \
238 	{ IMU_INTERRUPT_STATUS_ ## bit ## _S, \
242 	PX_ERR_DMC_CLASS(bit)
264 #define	MMU_BIT_DESC(bit, hdl, erpt) \  argument
265 	MMU_INTERRUPT_STATUS_ ## bit ## _P, \
269 	PX_ERR_DMC_CLASS(bit) }, \
270 	{ MMU_INTERRUPT_STATUS_ ## bit ## _S, \
274 	PX_ERR_DMC_CLASS(bit)
298 #define	ILU_BIT_DESC(bit, hdl, erpt) \  argument
299 	ILU_INTERRUPT_STATUS_ ## bit ## _P, \
303 	PX_ERR_PEC_CLASS(bit) }, \
304 	{ ILU_INTERRUPT_STATUS_ ## bit ## _S, \
308 	PX_ERR_PEC_CLASS(bit)
321 #define	TLU_UC_BIT_DESC(bit, hdl, erpt) \  argument
322 	TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_ ## bit ## _P, \
326 	PX_ERR_PEC_CLASS(bit) }, \
327 	{ TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_ ## bit ## _S, \
331 	PX_ERR_PEC_CLASS(bit)
332 #define	TLU_UC_OB_BIT_DESC(bit, hdl, erpt) \  argument
333 	TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_ ## bit ## _P, \
337 	PX_ERR_PEC_OB_CLASS(bit) }, \
338 	{ TLU_UNCORRECTABLE_ERROR_STATUS_CLEAR_ ## bit ## _S, \
342 	PX_ERR_PEC_OB_CLASS(bit)
374 #define	TLU_CE_BIT_DESC(bit, hdl, erpt) \  argument
375 	TLU_CORRECTABLE_ERROR_STATUS_CLEAR_ ## bit ## _P, \
379 	PX_ERR_PEC_CLASS(bit) }, \
380 	{ TLU_CORRECTABLE_ERROR_STATUS_CLEAR_ ## bit ## _S, \
384 	PX_ERR_PEC_CLASS(bit)
398 #define	TLU_OE_BIT_DESC(bit, hdl, erpt) \  argument
399 	TLU_OTHER_EVENT_STATUS_CLEAR_ ## bit ## _P, \
403 	PX_ERR_PEC_CLASS(bit) }, \
404 	{ TLU_OTHER_EVENT_STATUS_CLEAR_ ## bit ## _S, \
408 	PX_ERR_PEC_CLASS(bit)
409 #define	TLU_OE_OB_BIT_DESC(bit, hdl, erpt) \  argument
410 	TLU_OTHER_EVENT_STATUS_CLEAR_ ## bit ## _P, \
414 	PX_ERR_PEC_OB_CLASS(bit) }, \
415 	{ TLU_OTHER_EVENT_STATUS_CLEAR_ ## bit ## _S, \
419 	PX_ERR_PEC_OB_CLASS(bit)
474 #define	LPUL_BIT_DESC(bit, hdl, erpt) \  argument
475 	LPU_LINK_LAYER_INTERRUPT_AND_STATUS_INT_ ## bit, \
487 #define	LPUP_BIT_DESC(bit, hdl, erpt) \  argument
488 	LPU_PHY_LAYER_INTERRUPT_AND_STATUS_INT_ ## bit, \
500 #define	LPUR_BIT_DESC(bit, hdl, erpt) \  argument
501 	LPU_RECEIVE_PHY_INTERRUPT_AND_STATUS_INT_ ## bit, \
513 #define	LPUX_BIT_DESC(bit, hdl, erpt) \  argument
514 	LPU_TRANSMIT_PHY_INTERRUPT_AND_STATUS_INT_ ## bit, \
526 #define	LPUS_BIT_DESC(bit, hdl, erpt) \  argument
527 	LPU_LTSSM_INTERRUPT_AND_STATUS_INT_ ## bit, \
539 #define	LPUG_BIT_DESC(bit, hdl, erpt) \  argument
540 	LPU_GIGABLAZE_GLUE_INTERRUPT_AND_STATUS_INT_ ## bit, \
958 			if (!BIT_TST(ss_reg, err_bit_desc->bit))  in px_err_erpt_and_clr()
962 			if (BIT_TST(*count_mask, err_bit_desc->bit)) {  in px_err_erpt_and_clr()
985 				    derr, err_bit_desc->bit,  in px_err_erpt_and_clr()
1067 	    err_bit_descr->bit, err_bit_descr->class_name,  in px_err_log_handle()
1303 	boolean_t	pri = PX_ERR_IS_PRI(bit);  in PX_ERPT_SEND_DEC()
1330 	boolean_t	pri = PX_ERR_IS_PRI(bit);  in PX_ERPT_SEND_DEC()
1383 	boolean_t	pri = PX_ERR_IS_PRI(bit);  in PX_ERPT_SEND_DEC()
1439 	boolean_t	pri = PX_ERR_IS_PRI(bit);  in PX_ERPT_SEND_DEC()
1466 	boolean_t	pri = PX_ERR_IS_PRI(bit);  in PX_ERPT_SEND_DEC()
1542 	boolean_t	pri = PX_ERR_IS_PRI(err_bit_descr->bit);  in px_err_jbc_safe_acc_handle()
1570 	boolean_t	pri = PX_ERR_IS_PRI(bit);  in PX_ERPT_SEND_DEC()
1595 	boolean_t	pri = PX_ERR_IS_PRI(bit);  in PX_ERPT_SEND_DEC()
1620 	boolean_t	pri = PX_ERR_IS_PRI(bit);  in PX_ERPT_SEND_DEC()
1665 	boolean_t	pri = PX_ERR_IS_PRI(bit);  in PX_ERPT_SEND_DEC()
1690 	boolean_t	pri = PX_ERR_IS_PRI(bit);  in PX_ERPT_SEND_DEC()
1713 	boolean_t	pri = PX_ERR_IS_PRI(bit);  in PX_ERPT_SEND_DEC()
1754 	boolean_t	pri = PX_ERR_IS_PRI(bit);  in PX_ERPT_SEND_DEC()
1792 	if (!PX_ERR_IS_PRI(err_bit_descr->bit))  in px_err_mmu_rbne_handle()
1822 	if (!PX_ERR_IS_PRI(err_bit_descr->bit))  in px_err_mmu_tfa_handle()
1852 	if (!PX_ERR_IS_PRI(err_bit_descr->bit))  in px_err_mmu_parity_handle()
1884 	if (!PX_ERR_IS_PRI(err_bit_descr->bit))  in px_err_wuc_ruc_handle()
1947 	boolean_t	pri = PX_ERR_IS_PRI(bit);  in PX_ERPT_SEND_DEC()
1978 	if (err_bit_descr->bit < 32) {  in px_err_pciex_ue_handle()
1979 		err_bit = (uint32_t)BITMASK(err_bit_descr->bit);  in px_err_pciex_ue_handle()
1999 		regs.ue_reg = (uint32_t)BITMASK(err_bit_descr->bit - 32);  in px_err_pciex_ue_handle()
2017 	boolean_t	pri = PX_ERR_IS_PRI(bit);  in PX_ERPT_SEND_DEC()
2044 	boolean_t	pri = PX_ERR_IS_PRI(bit);  in PX_ERPT_SEND_DEC()
2071 	boolean_t	pri = PX_ERR_IS_PRI(bit);  in PX_ERPT_SEND_DEC()
2102 	boolean_t	pri = PX_ERR_IS_PRI(bit);  in PX_ERPT_SEND_DEC()
2131 	if (err_bit_descr->bit < 32)  in px_err_pciex_ce_handle()
2132 		regs.ce_reg = (uint32_t)BITMASK(err_bit_descr->bit);  in px_err_pciex_ce_handle()
2134 		regs.ce_reg = (uint32_t)BITMASK(err_bit_descr->bit - 32);  in px_err_pciex_ce_handle()
2151 	boolean_t	pri = PX_ERR_IS_PRI(bit);  in PX_ERPT_SEND_DEC()
2174 	boolean_t	pri = PX_ERR_IS_PRI(bit);  in PX_ERPT_SEND_DEC()
2201 	boolean_t	pri = PX_ERR_IS_PRI(bit);  in PX_ERPT_SEND_DEC()
2214 	if ((bit == TLU_OTHER_EVENT_STATUS_SET_RUC_P) ||  in PX_ERPT_SEND_DEC()
2215 	    (bit == TLU_OTHER_EVENT_STATUS_SET_WUC_P)) {  in PX_ERPT_SEND_DEC()
2268 	boolean_t	pri = PX_ERR_IS_PRI(bit);  in PX_ERPT_SEND_DEC()