Lines Matching full:panic
149 { JBC_BIT_DESC(UE_ASYN, panic, jbc_in) },
151 { JBC_BIT_DESC(JTE, panic, jbc_in) },
152 { JBC_BIT_DESC(JBE, panic, jbc_in) },
153 { JBC_BIT_DESC(JUE, panic, jbc_in) },
154 { JBC_BIT_DESC(ICISE, panic, jbc_in) },
157 { JBC_BIT_DESC(ILL_BMW, panic, jbc_in) },
158 { JBC_BIT_DESC(ILL_BMR, panic, jbc_in) },
159 { JBC_BIT_DESC(BJC, panic, jbc_in) },
162 { JBC_BIT_DESC(IJP, panic, jbc_out) },
182 { JBC_BIT_DESC(EBUS_TO, panic, jbc_csr) }
205 { UBC_BIT_DESC(DMAWTUEA, panic, ubc_fatal) },
206 { UBC_BIT_DESC(MEMRDAXA, panic, ubc_fatal) },
207 { UBC_BIT_DESC(MEMWTAXA, panic, ubc_fatal) },
209 { UBC_BIT_DESC(DMAWTUEB, panic, ubc_fatal) },
210 { UBC_BIT_DESC(MEMRDAXB, panic, ubc_fatal) },
211 { UBC_BIT_DESC(MEMWTAXB, panic, ubc_fatal) },
212 { UBC_BIT_DESC(PIOWTUE, panic, ubc_fatal) },
213 { UBC_BIT_DESC(PIOWBEUE, panic, ubc_fatal) },
214 { UBC_BIT_DESC(PIORBEUE, panic, ubc_fatal) }
245 { IMU_BIT_DESC(MSI_MAL_ERR, panic, imu_rds) },
246 { IMU_BIT_DESC(MSI_PAR_ERR, panic, imu_rds) },
247 { IMU_BIT_DESC(PMEACK_MES_NOT_EN, panic, imu_rds) },
248 { IMU_BIT_DESC(PMPME_MES_NOT_EN, panic, imu_rds) },
249 { IMU_BIT_DESC(FATAL_MES_NOT_EN, panic, imu_rds) },
250 { IMU_BIT_DESC(NONFATAL_MES_NOT_EN, panic, imu_rds) },
251 { IMU_BIT_DESC(COR_MES_NOT_EN, panic, imu_rds) },
252 { IMU_BIT_DESC(MSI_NOT_EN, panic, imu_rds) },
255 { IMU_BIT_DESC(EQ_NOT_EN, panic, imu_scs) },
279 { MMU_BIT_DESC(TRN_ERR, panic, mmu_tfar_tfsr) },
284 { MMU_BIT_DESC(TBW_DME, panic, mmu_tfar_tfsr) },
285 { MMU_BIT_DESC(TBW_UDE, panic, mmu_tfar_tfsr) },
286 { MMU_BIT_DESC(TBW_ERR, panic, mmu_tfar_tfsr) },
290 { MMU_BIT_DESC(TTC_CAE, panic, mmu) }
311 { ILU_BIT_DESC(IHB_PE, panic, pec_ilu) }
430 { TLU_OE_BIT_DESC(IIP, panic, pciex_oe) },
431 { TLU_OE_BIT_DESC(EDP, panic, pciex_oe) },
432 { TLU_OE_BIT_DESC(EHP, panic, pciex_oe) },
433 { TLU_OE_OB_BIT_DESC(TLUEITMO, panic, pciex_oe) },
438 { TLU_OE_BIT_DESC(ERU, panic, pciex_oe) },
439 { TLU_OE_BIT_DESC(ERO, panic, pciex_oe) },
440 { TLU_OE_BIT_DESC(EMP, panic, pciex_oe) },
441 { TLU_OE_BIT_DESC(EPE, panic, pciex_oe) },
442 { TLU_OE_BIT_DESC(ERP, panic, pciex_oe) },
443 { TLU_OE_BIT_DESC(EIP, panic, pciex_oe) }
1014 * system doesn't need to panic, but PEEK/POKE still failed. in px_err_check_severity()
1093 px_err_log_handle(rpdip, err_reg_descr, err_bit_descr, "PANIC"); in px_err_panic_handle()
1121 "NO PANIC"); in px_err_no_panic_handle()
1370 * just panic as it is unknown which address has been affected. in px_err_jbc_merge_handle()
1425 * just panic as it is unknown which address has been affected. in px_err_jbc_jbusint_in_handle()
1505 * just panic as it is unknown which address has been affected. in px_err_jbc_dmcint_odcd_handle()
1778 * failed by marking their DMA handle as failed, but do not panic the system.
1808 * handles. Fire should not panic the system, it'll be up to the driver to
1809 * panic. The address logged is invalid.
1838 * retry. If Fire is unable to contact the leaf driver, panic the system.