1068 pci_sc_ctx_inv(dev_info_t *dip, sc_t *sc_p, ddi_dma_impl_t *mp)  in pci_sc_ctx_inv()  argument
1071 	volatile uint64_t *reg_addr = sc_p->sc_ctx_match_reg + ctx;  in pci_sc_ctx_inv()
1079 	*sc_p->sc_ctx_invl_reg = ctx;	/* 1st flush write */  in pci_sc_ctx_inv()
1087 			*sc_p->sc_ctx_invl_reg = ctx;  in pci_sc_ctx_inv()
1401 pci_sc_setup(sc_t *sc_p)  in pci_sc_setup()  argument
1403 	pci_t *pci_p = sc_p->sc_pci_p;  in pci_sc_setup()
1411 	sc_p->sc_ctrl_reg = (uint64_t *)(a + SCHIZO_SC_CTRL_REG_OFFSET);  in pci_sc_setup()
1412 	sc_p->sc_invl_reg = (uint64_t *)(a + SCHIZO_SC_INVL_REG_OFFSET);  in pci_sc_setup()
1413 	sc_p->sc_sync_reg = (uint64_t *)(a + SCHIZO_SC_SYNC_REG_OFFSET);  in pci_sc_setup()
1414 	sc_p->sc_ctx_invl_reg = (uint64_t *)(a + SCHIZO_SC_CTX_INVL_REG_OFFSET);  in pci_sc_setup()
1415 	sc_p->sc_ctx_match_reg =  in pci_sc_setup()
1422 	sc_p->sc_data_diag_acc = (uint64_t *)(a + SCHIZO_SC_DATA_DIAG_OFFSET);  in pci_sc_setup()
1423 	sc_p->sc_tag_diag_acc = (uint64_t *)(a + SCHIZO_SC_TAG_DIAG_OFFSET);  in pci_sc_setup()
1424 	sc_p->sc_ltag_diag_acc = (uint64_t *)(a + SCHIZO_SC_LTAG_DIAG_OFFSET);  in pci_sc_setup()