1052 pci_iommu_get_dvma_context(iommu_t *iommu_p, dvma_addr_t dvma_pg_index)  in pci_iommu_get_dvma_context()  argument
1060 pci_iommu_free_dvma_context(iommu_t *iommu_p, dvma_context_t ctx)  in pci_iommu_free_dvma_context()  argument
1066 pci_iommu_config(iommu_t *iommu_p, uint64_t iommu_ctl, uint64_t cfgpa)  in pci_iommu_config()  argument
1069 	    get_pbm_reg_base(iommu_p->iommu_pci_p);  in pci_iommu_config()
1072 	volatile uint64_t *iommu_ctl_p = iommu_p->iommu_ctrl_reg;  in pci_iommu_config()
1073 	volatile uint64_t tsb_bar_val = iommu_p->iommu_tsb_paddr;  in pci_iommu_config()
1074 	volatile uint64_t *tsb_bar_p = iommu_p->iommu_tsb_base_addr_reg;  in pci_iommu_config()
1076 	DEBUG2(DBG_ATTACH, iommu_p->iommu_pci_p->pci_dip,  in pci_iommu_config()
1079 	DEBUG2(DBG_ATTACH|DBG_CONT, iommu_p->iommu_pci_p->pci_dip,  in pci_iommu_config()
1082 	DEBUG2(DBG_ATTACH|DBG_CONT, iommu_p->iommu_pci_p->pci_dip,  in pci_iommu_config()
1159 pci_iommu_setup(iommu_t *iommu_p)  in pci_iommu_setup()  argument
1164 	pci_t *pci_p = iommu_p->iommu_pci_p;  in pci_iommu_setup()
1179 	iommu_p->iommu_dvma_end = dvma_prop->dvma_base +  in pci_iommu_setup()
1186 	iommu_p->iommu_tsb_size = iommu_tsb_size_encode(tsb_size);  in pci_iommu_setup()
1194 	iommu_p->iommu_ctx_bitmap = NULL;  in pci_iommu_setup()
1195 	iommu_p->iommu_flush_ctx_reg = NULL;  in pci_iommu_setup()
1208 pci_iommu_teardown(iommu_t *iommu_p)  in pci_iommu_teardown()  argument
1943 pci_vmem_free(iommu_t *iommu_p, ddi_dma_impl_t *mp, void *dvma_addr,  in pci_vmem_free()  argument
1946 	pci_vmem_do_free(iommu_p, dvma_addr, npages,  in pci_vmem_free()