108 static int pcitool_validate_barnum_bdf(pcitool_reg_t *prg);
109 static int pcitool_get_bar(pci_t *pci_p, pcitool_reg_t *prg,
112 static int pcitool_config_request(pci_t *pci_p, pcitool_reg_t *prg,
629 	pcitool_reg_t		prg;  in pcitool_bus_reg_ops()  local
642 	if (ddi_copyin(arg, &prg, sizeof (pcitool_reg_t), mode) !=  in pcitool_bus_reg_ops()
655 			prg.status = PCITOOL_REGPROP_NOTWELLFORMED;  in pcitool_bus_reg_ops()
662 	if (prg.barnum >=  in pcitool_bus_reg_ops()
664 		prg.status = PCITOOL_OUT_OF_RANGE;  in pcitool_bus_reg_ops()
669 	size = PCITOOL_ACC_ATTR_SIZE(prg.acc_attr);  in pcitool_bus_reg_ops()
670 	base_addr = pci_rp[prg.barnum].phys_addr;  in pcitool_bus_reg_ops()
671 	max_addr = base_addr + pci_rp[prg.barnum].size;  in pcitool_bus_reg_ops()
672 	prg.phys_addr = base_addr + prg.offset;  in pcitool_bus_reg_ops()
677 	    base_addr, prg.offset, prg.phys_addr, max_addr);  in pcitool_bus_reg_ops()
681 	    prg.phys_addr, max_addr, &prg.data, size, write_flag,  in pcitool_bus_reg_ops()
682 	    PCITOOL_ACC_IS_BIG_ENDIAN(prg.acc_attr), &prg.status);  in pcitool_bus_reg_ops()
688 	prg.drvr_version = PCITOOL_VERSION;  in pcitool_bus_reg_ops()
689 	if (ddi_copyout(&prg, arg, sizeof (pcitool_reg_t), mode) !=  in pcitool_bus_reg_ops()
700 pcitool_validate_barnum_bdf(pcitool_reg_t *prg)  in pcitool_validate_barnum_bdf()  argument
704 	if (prg->barnum >= (sizeof (pci_bars) / sizeof (pci_bars[0]))) {  in pcitool_validate_barnum_bdf()
705 		prg->status = PCITOOL_OUT_OF_RANGE;  in pcitool_validate_barnum_bdf()
709 	} else if (((prg->bus_no &  in pcitool_validate_barnum_bdf()
710 	    (PCI_REG_BUS_M >> PCI_REG_BUS_SHIFT)) != prg->bus_no) ||  in pcitool_validate_barnum_bdf()
711 	    ((prg->dev_no &  in pcitool_validate_barnum_bdf()
712 	    (PCI_REG_DEV_M >> PCI_REG_DEV_SHIFT)) != prg->dev_no) ||  in pcitool_validate_barnum_bdf()
713 	    ((prg->func_no &  in pcitool_validate_barnum_bdf()
714 	    (PCI_REG_FUNC_M >> PCI_REG_FUNC_SHIFT)) != prg->func_no)) {  in pcitool_validate_barnum_bdf()
715 		prg->status = PCITOOL_INVALID_ADDRESS;  in pcitool_validate_barnum_bdf()
723 pcitool_get_bar(pci_t *pci_p, pcitool_reg_t *prg, uint64_t config_base_addr,  in pcitool_get_bar()  argument
738 	bar_offset = PCI_BAR_OFFSET((*prg));  in pcitool_get_bar()
741 	    prg->barnum, bar_offset);  in pcitool_get_bar()
753 	    &prg->status);  in pcitool_get_bar()
759 		prg->status = PCITOOL_INVALID_ADDRESS;  in pcitool_get_bar()
787 			prg->status = PCITOOL_OUT_OF_RANGE;  in pcitool_get_bar()
797 		    &prg->status);  in pcitool_get_bar()
809 pcitool_config_request(pci_t *pci_p, pcitool_reg_t *prg, uint64_t base_addr,  in pcitool_config_request()  argument
816 	prg->phys_addr = base_addr + prg->offset;  in pcitool_config_request()
820 	    base_addr, prg->offset, prg->phys_addr,  in pcitool_config_request()
821 	    (PCITOOL_ACC_IS_BIG_ENDIAN(prg->acc_attr)? "big" : "ltl"));  in pcitool_config_request()
824 	rval = pcitool_access(pci_p, prg->phys_addr, max_addr, &prg->data, size,  in pcitool_config_request()
825 	    write_flag, PCITOOL_ACC_IS_BIG_ENDIAN(prg->acc_attr), &prg->status);  in pcitool_config_request()
827 	DEBUG1(DBG_TOOLS, dip, "config access: data:0x%llx\n", prg->data);  in pcitool_config_request()
839 	pcitool_reg_t	prg;  in pcitool_dev_reg_ops()  local
854 	if (ddi_copyin(arg, &prg, sizeof (pcitool_reg_t), mode) !=  in pcitool_dev_reg_ops()
861 	    prg.bus_no, prg.dev_no, prg.func_no);  in pcitool_dev_reg_ops()
863 	if ((rval = pcitool_validate_barnum_bdf(&prg)) != SUCCESS)  in pcitool_dev_reg_ops()
866 	size = PCITOOL_ACC_ATTR_SIZE(prg.acc_attr);  in pcitool_dev_reg_ops()
879 	    (prg.bus_no << PCI_REG_BUS_SHIFT) +  in pcitool_dev_reg_ops()
880 	    (prg.dev_no << PCI_REG_DEV_SHIFT) +  in pcitool_dev_reg_ops()
881 	    (prg.func_no << PCI_REG_FUNC_SHIFT);  in pcitool_dev_reg_ops()
884 		prg.status = PCITOOL_OUT_OF_RANGE;  in pcitool_dev_reg_ops()
891 	    prg.bus_no << PCI_REG_BUS_SHIFT, prg.dev_no << PCI_REG_DEV_SHIFT,  in pcitool_dev_reg_ops()
892 	    prg.func_no << PCI_REG_FUNC_SHIFT, base_addr);  in pcitool_dev_reg_ops()
895 	if (prg.barnum == 0) {  in pcitool_dev_reg_ops()
897 		rval = pcitool_config_request(pci_p, &prg, base_addr, max_addr,  in pcitool_dev_reg_ops()
902 		if (pcitool_get_bar(pci_p, &prg, base_addr, max_addr, &bar,  in pcitool_dev_reg_ops()
932 			if (PCI_BAR_OFFSET(prg) == PCI_CONF_ROM) {  in pcitool_dev_reg_ops()
939 					prg.status = PCITOOL_ROM_WRITE;  in pcitool_dev_reg_ops()
945 					prg.status = PCITOOL_ROM_DISABLED;  in pcitool_dev_reg_ops()
962 		    "offset:0x%lx\n", bar, base_addr, prg.offset);  in pcitool_dev_reg_ops()
969 		prg.phys_addr = base_addr + prg.offset;  in pcitool_dev_reg_ops()
970 		rval = pcitool_access(pci_p, prg.phys_addr,  in pcitool_dev_reg_ops()
971 		    max_addr, &prg.data, size, write_flag,  in pcitool_dev_reg_ops()
972 		    PCITOOL_ACC_IS_BIG_ENDIAN(prg.acc_attr), &prg.status);  in pcitool_dev_reg_ops()
976 	prg.drvr_version = PCITOOL_VERSION;  in pcitool_dev_reg_ops()
977 	if (ddi_copyout(&prg, arg, sizeof (pcitool_reg_t), mode) !=  in pcitool_dev_reg_ops()