Lines Matching refs:g4
372 andn %g3, EN_REG_NCEEN + EN_REG_CEEN, %g4
373 stxa %g4, [%g0]ASI_ESTATE_ERR
389 and %g3, EN_REG_CEEN, %g4 ! store the CEEN value, TL=0
391 DO_CPU_LOGOUT(%g3, %g2, %g6, %g4, %g5, %g6, %g3, %g4)
398 CPU_INDEX(%g4, %g5)
399 mulx %g4, CPU_NODE_SIZE, %g4
401 add %g4, %g5, %g4
402 ld [%g4 + ECACHE_LINESIZE], %g5
403 ld [%g4 + ECACHE_SIZE], %g4
412 ECACHE_FLUSHALL(%g4, %g5, %g6, %g7)
443 CH_ICACHE_FLUSHALL(%g5, %g6, %g7, %g4)
487 rdpr %pil, %g4
488 cmp %g4, PIL_14
490 movl %icc, PIL_14, %g4
525 ldxa [%g0]ASI_ESTATE_ERR, %g4
526 and %g4, EN_REG_CEEN, %g4
528 DO_TL1_CPU_LOGOUT(%g3, %g2, %g4, %g5, %g6, %g3, %g4)
552 set JP_ECACHE_MAX_SIZE, %g4
561 ECACHE_FLUSHALL(%g4, JP_ECACHE_MAX_LSIZE, %g5, %g6)
588 ASM_LD(%g4, dcache_size)
590 CH_DCACHE_FLUSHALL(%g4, %g5, %g6)
611 ASM_LD(%g4, icache_size)
613 CH_ICACHE_FLUSHALL(%g4, %g5, %g6, %g3)
637 ld [%g6 + TRAPTR_OFFSET], %g4
638 add %g5, %g4, %g5
645 rd STICK, %g4
646 stxa %g4, [%g5 + TRAP_ENT_TICK]%asi
647 rdpr %tl, %g4
648 stha %g4, [%g5 + TRAP_ENT_TL]%asi
649 rdpr %tt, %g4
650 stha %g4, [%g5 + TRAP_ENT_TT]%asi
651 rdpr %tpc, %g4
652 stna %g4, [%g5 + TRAP_ENT_TPC]%asi
653 rdpr %tstate, %g4
654 stxa %g4, [%g5 + TRAP_ENT_TSTATE]%asi
659 ldxa [%g1 + CH_ERR_TL1_SDW_AFSR]%asi, %g4
662 stna %g4, [%g5 + TRAP_ENT_F2]%asi
665 ldxa [%g1 + CH_ERR_TL1_AFSR]%asi, %g4
668 stna %g4, [%g5 + TRAP_ENT_F4]%asi
675 ld [%g6 + TRAPTR_LIMIT], %g4
678 sub %g4, TRAP_ENT_SIZE, %g4
679 cmp %g5, %g4
699 set 1, %g4
700 sllx %g4, C_AFSR_UCU_SHIFT, %g4
701 btst %g4, %g3 ! UCU in original AFSR?
704 ldxa [%g0]ASI_AFSR, %g4 ! current AFSR
705 or %g3, %g4, %g3 ! %g3 = original + current AFSR
706 set 1, %g4
707 sllx %g4, C_AFSR_WDU_SHIFT, %g4
708 btst %g4, %g3 ! WDU in original or current AFSR?