Lines Matching refs:g5
176 add %g1, CH_ERR_TL1_LOGOUT, %g5
177 DO_TL1_CPU_LOGOUT(%g3, %g2, %g4, %g5, %g6, %g3, %g4)
192 andn %g7, EN_REG_CEEN | EN_REG_NCEEN, %g5
193 stxa %g5, [%g0]ASI_ESTATE_ERR
201 PN_L2_FLUSHALL(%g3, %g4, %g5)
204 set CH_ECACHE_MIN_LSIZE, %g5
213 CHP_ECACHE_FLUSHALL(%g4, %g5, %g3)
233 ASM_LD(%g5, dcache_linesize)
234 CH_DCACHE_FLUSHALL(%g4, %g5, %g6)
260 mov CH_ICACHE_LSIZE, %g5
263 movz %xcc, PN_ICACHE_LSIZE, %g5
264 CH_ICACHE_FLUSHALL(%g4, %g5, %g6, %g3)
279 CPU_INDEX(%g6, %g5)
281 set trap_trace_ctl, %g5
282 add %g6, %g5, %g6
283 ld [%g6 + TRAPTR_LIMIT], %g5
284 tst %g5
287 ldx [%g6 + TRAPTR_PBASE], %g5
289 add %g5, %g4, %g5
297 stxa %g4, [%g5 + TRAP_ENT_TICK]%asi
299 stha %g4, [%g5 + TRAP_ENT_TL]%asi
301 stha %g4, [%g5 + TRAP_ENT_TT]%asi
303 stna %g4, [%g5 + TRAP_ENT_TPC]%asi
305 stxa %g4, [%g5 + TRAP_ENT_TSTATE]%asi
306 stna %sp, [%g5 + TRAP_ENT_SP]%asi
307 stna %g0, [%g5 + TRAP_ENT_TR]%asi
312 stna %g3, [%g5 + TRAP_ENT_F1]%asi
313 stna %g4, [%g5 + TRAP_ENT_F2]%asi
318 stna %g3, [%g5 + TRAP_ENT_F3]%asi
319 stna %g4, [%g5 + TRAP_ENT_F4]%asi
325 ld [%g6 + TRAPTR_OFFSET], %g5
327 st %g5, [%g6 + TRAPTR_LAST_OFFSET]
328 add %g5, TRAP_ENT_SIZE, %g5
330 cmp %g5, %g4
331 movge %icc, 0, %g5
332 st %g5, [%g6 + TRAPTR_OFFSET]
585 set TAGREAD_CTX_MASK, %g5
586 and %g4, %g5, %g4
602 set PN_ITLB_PGSZ_MASK, %g5
603 and %g3, %g5, %g5
604 srlx %g5, PN_ITLB_PGSZ_SHIFT, %g5
605 PN_GET_TLB_INDEX(%g4, %g5) ! %g4 has the index
607 set PN_ITLB_T512, %g5
608 or %g4, %g5, %g4 ! and add in the TLB ID
620 GET_CPU_PRIVATE_PTR(%g6, %g1, %g5, itlb_parity_trap_1)
623 set LOGOUT_INVALID_L32, %g5 ! unavailable or if it is
624 or %g5, %g6, %g5 ! already being used, then we
727 set TAGREAD_CTX_MASK, %g5 ! 'or' in the trap context
728 and %g4, %g5, %g4 ! to complete the tlo_info
743 set PN_DTLB_PGSZ0_MASK, %g5
744 and %g3, %g5, %g5
745 srlx %g5, PN_DTLB_PGSZ0_SHIFT, %g5
746 PN_GET_TLB_INDEX(%g4, %g5) ! %g4 has the DTLB_0 index
748 set PN_DTLB_T512_0, %g5
749 or %g4, %g5, %g4 ! and add in the TLB ID
752 set PN_DTLB_PGSZ1_MASK, %g5
753 and %g3, %g5, %g5
754 srlx %g5, PN_DTLB_PGSZ1_SHIFT, %g5
755 PN_GET_TLB_INDEX(%g7, %g5) ! %g7 has the DTLB_1 index
757 set PN_DTLB_T512_1, %g5
758 or %g7, %g5, %g7 ! and add in the TLB ID
802 GET_CPU_PRIVATE_PTR(%g6, %g1, %g5, dtlb_parity_trap_2)
805 set LOGOUT_INVALID_L32, %g5 ! unavailable or if it is
806 or %g5, %g6, %g5 ! already being used, then we