Lines Matching refs:i0

654 	subcc	%i1, %i0, %i3
742 mov %i0, %i1
743 mov %i5, %i0
749 andcc %i0, 7, %o3
759 inc %i0
762 stb %o4, [%i0 - 1]
764 andcc %i0, 63, %i3
781 std %d8, [%i0]
784 add %i0, 8, %i0
789 std %d8, [%i0]
792 add %i0, 8, %i0
861 stda %d48, [%i0]ASI_BLK_P
865 add %i0, 64, %i0
869 stda %d48, [%i0]ASI_BLK_P
873 add %i0, 64, %i0
877 stda %d48, [%i0]ASI_BLK_P
881 add %i0, 64, %i0
886 stda %d48, [%i0]ASI_BLK_P
887 add %i0, 64, %i0
890 stda %d48, [%i0]ASI_BLK_P
892 add %i0, 64, %i0
896 stda %d48, [%i0]ASI_BLK_P
897 add %i0, 64, %i0
900 stda %d48, [%i0]ASI_BLK_P
902 add %i0, 64, %i0
906 stda %d48, [%i0]ASI_BLK_P
907 add %i0, 64, %i0
910 stda %d48, [%i0]ASI_BLK_P
912 add %i0, 64, %i0
918 stda %d48, [%i0]ASI_BLK_P
922 add %i0, 64, %i0
926 stda %d48, [%i0]ASI_BLK_P
930 add %i0, 64, %i0
934 stda %d48, [%i0]ASI_BLK_P
938 add %i0, 64, %i0
942 stda %d48, [%i0]ASI_BLK_P
943 add %i0, 64, %i0
946 stda %d48, [%i0]ASI_BLK_P
948 add %i0, 64, %i0
952 stda %d48, [%i0]ASI_BLK_P
953 add %i0, 64, %i0
956 stda %d48, [%i0]ASI_BLK_P
958 add %i0, 64, %i0
962 stda %d48, [%i0]ASI_BLK_P
963 add %i0, 64, %i0
966 stda %d48, [%i0]ASI_BLK_P
968 add %i0, 64, %i0
974 stda %d48, [%i0]ASI_BLK_P
978 add %i0, 64, %i0
982 stda %d48, [%i0]ASI_BLK_P
986 add %i0, 64, %i0
990 stda %d48, [%i0]ASI_BLK_P
994 add %i0, 64, %i0
999 stda %d48, [%i0]ASI_BLK_P
1000 add %i0, 64, %i0
1003 stda %d48, [%i0]ASI_BLK_P
1005 add %i0, 64, %i0
1009 stda %d48, [%i0]ASI_BLK_P
1010 add %i0, 64, %i0
1013 stda %d48, [%i0]ASI_BLK_P
1015 add %i0, 64, %i0
1019 stda %d48, [%i0]ASI_BLK_P
1020 add %i0, 64, %i0
1023 stda %d48, [%i0]ASI_BLK_P
1025 add %i0, 64, %i0
1031 stda %d48, [%i0]ASI_BLK_P
1035 add %i0, 64, %i0
1039 stda %d48, [%i0]ASI_BLK_P
1043 add %i0, 64, %i0
1047 stda %d48, [%i0]ASI_BLK_P
1051 add %i0, 64, %i0
1056 stda %d48, [%i0]ASI_BLK_P
1057 add %i0, 64, %i0
1060 stda %d48, [%i0]ASI_BLK_P
1062 add %i0, 64, %i0
1066 stda %d48, [%i0]ASI_BLK_P
1067 add %i0, 64, %i0
1070 stda %d48, [%i0]ASI_BLK_P
1072 add %i0, 64, %i0
1076 stda %d48, [%i0]ASI_BLK_P
1077 add %i0, 64, %i0
1080 stda %d48, [%i0]ASI_BLK_P
1082 add %i0, 64, %i0
1088 stda %d48, [%i0]ASI_BLK_P
1092 add %i0, 64, %i0
1096 stda %d48, [%i0]ASI_BLK_P
1100 add %i0, 64, %i0
1104 stda %d48, [%i0]ASI_BLK_P
1108 add %i0, 64, %i0
1113 stda %d48, [%i0]ASI_BLK_P
1114 add %i0, 64, %i0
1117 stda %d48, [%i0]ASI_BLK_P
1119 add %i0, 64, %i0
1123 stda %d48, [%i0]ASI_BLK_P
1124 add %i0, 64, %i0
1127 stda %d48, [%i0]ASI_BLK_P
1129 add %i0, 64, %i0
1133 stda %d48, [%i0]ASI_BLK_P
1134 add %i0, 64, %i0
1137 stda %d48, [%i0]ASI_BLK_P
1139 add %i0, 64, %i0
1145 stda %d48, [%i0]ASI_BLK_P
1149 add %i0, 64, %i0
1153 stda %d48, [%i0]ASI_BLK_P
1157 add %i0, 64, %i0
1161 stda %d48, [%i0]ASI_BLK_P
1165 add %i0, 64, %i0
1170 stda %d48, [%i0]ASI_BLK_P
1171 add %i0, 64, %i0
1174 stda %d48, [%i0]ASI_BLK_P
1176 add %i0, 64, %i0
1180 stda %d48, [%i0]ASI_BLK_P
1181 add %i0, 64, %i0
1184 stda %d48, [%i0]ASI_BLK_P
1186 add %i0, 64, %i0
1190 stda %d48, [%i0]ASI_BLK_P
1191 add %i0, 64, %i0
1194 stda %d48, [%i0]ASI_BLK_P
1196 add %i0, 64, %i0
1202 stda %d48, [%i0]ASI_BLK_P
1206 add %i0, 64, %i0
1210 stda %d48, [%i0]ASI_BLK_P
1214 add %i0, 64, %i0
1218 stda %d48, [%i0]ASI_BLK_P
1222 add %i0, 64, %i0
1227 stda %d48, [%i0]ASI_BLK_P
1228 add %i0, 64, %i0
1231 stda %d48, [%i0]ASI_BLK_P
1233 add %i0, 64, %i0
1237 stda %d48, [%i0]ASI_BLK_P
1238 add %i0, 64, %i0
1241 stda %d48, [%i0]ASI_BLK_P
1243 add %i0, 64, %i0
1247 stda %d48, [%i0]ASI_BLK_P
1248 add %i0, 64, %i0
1251 stda %d48, [%i0]ASI_BLK_P
1253 add %i0, 64, %i0
1259 stda %d48, [%i0]ASI_BLK_P
1263 add %i0, 64, %i0
1267 stda %d48, [%i0]ASI_BLK_P
1271 add %i0, 64, %i0
1275 stda %d48, [%i0]ASI_BLK_P
1279 add %i0, 64, %i0
1284 stda %d48, [%i0]ASI_BLK_P
1285 add %i0, 64, %i0
1288 stda %d48, [%i0]ASI_BLK_P
1290 add %i0, 64, %i0
1294 stda %d48, [%i0]ASI_BLK_P
1295 add %i0, 64, %i0
1298 stda %d48, [%i0]ASI_BLK_P
1300 add %i0, 64, %i0
1304 stda %d48, [%i0]ASI_BLK_P
1305 add %i0, 64, %i0
1308 stda %d48, [%i0]ASI_BLK_P
1310 add %i0, 64, %i0
1320 std %d48, [%i0]
1321 add %i0, 8, %i0
1326 std %d48, [%i0]
1327 add %i0, 8, %i0
1332 std %d48, [%i0]
1333 add %i0, 8, %i0
1338 std %d48, [%i0]
1339 add %i0, 8, %i0
1344 std %d48, [%i0]
1345 add %i0, 8, %i0
1350 std %d48, [%i0]
1351 add %i0, 8, %i0
1356 std %d48, [%i0]
1357 add %i0, 8, %i0
1368 std %d48, [%i0]
1369 add %i0, 8, %i0
1374 std %d48, [%i0]
1375 add %i0, 8, %i0
1380 std %d48, [%i0]
1381 add %i0, 8, %i0
1386 std %d48, [%i0]
1387 add %i0, 8, %i0
1392 std %d48, [%i0]
1393 add %i0, 8, %i0
1398 std %d48, [%i0]
1399 add %i0, 8, %i0
1404 std %d48, [%i0]
1405 add %i0, 8, %i0
1415 std %d48, [%i0]
1416 add %i0, 8, %i0
1421 std %d48, [%i0]
1422 add %i0, 8, %i0
1427 std %d48, [%i0]
1428 add %i0, 8, %i0
1433 std %d48, [%i0]
1434 add %i0, 8, %i0
1439 std %d48, [%i0]
1440 add %i0, 8, %i0
1445 std %d48, [%i0]
1446 add %i0, 8, %i0
1451 std %d48, [%i0]
1452 add %i0, 8, %i0
1464 std %d8, [%i0]
1466 add %i0, 8, %i0
1471 std %d8, [%i0]
1473 add %i0, 8, %i0
1482 inc %i0
1485 stb %i4, [%i0 - 1]
1589 xor %i0, %i1, %o4 ! xor from and to address
1594 xor %i0, %i1, %o4 ! xor from and to address
1597 btst 3, %i0 ! delay slot, from address unaligned?
1604 ! i0 - src address, i1 - dest address, i2 - count
1624 ldub [%i0], %i3 ! read a byte from source address
1625 add %i0, 1, %i0 ! increment source address
1627 btst 3, %i0 ! is source aligned?
1634 ld [%i0], %i3 ! read a word
1635 add %i0, 4, %i0 ! increment source address
1681 ld [%i0], %i4 ! read a word
1682 add %i0, 4, %i0 ! increment source address
1699 ld [%i0], %i3 ! read a source word
1700 add %i0, 4, %i0 ! increment source address
1724 sub %i0, %i1, %i0 ! i0 gets the difference of src and dst
1729 ldub [%i0], %i3 ! read a byte from source address
1730 add %i0, 1, %i0 ! increment source address
1732 btst 3, %i0 ! is source aligned?
1754 sub %i0, %i1, %i0 ! i0 gets the difference of src and dst
1756 ldx [%i0+%i1], %o4 ! read from address
1770 ld [%i0+%i1], %o4 ! read from address
1782 sub %i0, %i1, %i0 ! i0 gets the difference of src and dst
1789 sub %i0, %i1, %i0 ! i0 gets difference of src and dst
1793 ! assumes dest in %i1 and (source - dest) in %i0
1801 ldub [%i0+%i1], %o4 ! read from address
1838 inc %i0 ! inc from
1843 btst %o0, %i0 ! %o0 is bit mask to check for alignment
1845 ldub [%i0], %o4 ! read next byte
1908 ! %i0 - source address (arg)
1930 ldda [%i0]ASI_BLK_P, %d0
1931 add %i0, 64, %i0
1934 2: ldda [%i0]ASI_BLK_P, %d16
1944 add %i0, 64, %i0
1948 ldda [%i0]ASI_BLK_P, %d0
1958 add %i0, 64, %i0
4652 ! %i0 - start address
4663 andcc %i0, (64-1), %g0
4678 mov %i0, %o0
4714 ! stda %d0, [%i0+192]%asi ! in dly slot of branch that got us here
4715 stda %d0, [%i0+128]%asi
4716 stda %d0, [%i0+64]%asi
4717 stda %d0, [%i0]%asi
4719 add %i0, %i3, %i0
4724 stda %d0, [%i0+192]%asi