Lines Matching +full:sub +full:- +full:processor

69 	sub	tmp3, tmp1, tmp2					;\
75 sub tmp2, tmp1, tmp2 ;\
89 sub tmp3, tmp1, tmp3 ;\
93 bz,pn %icc, 5f /* branch if no valid sub-blocks */ ;\
103 sub tmp3, tmp1, tmp3 ;\
115 sub tmp3, tmp1, arg2 ;\
119 bz,pn %icc, 5f /* br if no valid sub-blocks */ ;\
129 sub arg2, tmp1, arg2 ;\
148 sub tmp2, tmp1, tmp2; \
154 sub tmp2, tmp1, tmp2; \
165 sub size, linesize, tmp; \
171 sub tmp, linesize, tmp; \
182 sub size, linesize, tmp; \
188 sub tmp, linesize, tmp; \
204 * - disable interrupts and clear address mask
206 * - Blow out the TLB, flush user page.
236 * - Before first compare:
265 sub arg1, 1, arg1
271 * - Before first compare:
300 sub arg1, 1, arg1
321 * UltraSPARC-IIe processor supports both 4-way set associative and
328 * successive ecache line for the 2*ecache-size range. We have to repeat
333 * address and load at set-size stride, wrapping around at 2*ecache-size
432 sub %g2, 1, %g2 ! %g2 = # entries in ITLB - 1
433 sub %g1, 1, %g1 ! %g1 = # entries in DTLB - 1
453 * x-trap to flush page from tlb and tsb
455 * %g1 = vaddr, zero-extended on 32-bit kernel
479 * x-trap to flush pgcnt MMU_PAGESIZE pages from tlb
481 * %g1 = vaddr, zero-extended on 32-bit kernel
497 and %g4, %g2, %g3 /* g3 = pgcnt - 1 */
531 * Flush 1 8k page of the D-$ with physical page = pfnum
560 * x-trap to flush page from the d$
610 * %o0 - function or inumber to call
611 * %o1, %o2 - arguments (2 uint64_t's)
673 * Flush a portion of the I-$ starting at vaddr
683 subcc %o1, ICACHE_FLUSHSZ, %o1 ! bytes = bytes-0x20
697 * %o0 - 64 bit physical address
698 * %o1 - size of address range to read
699 * %o2 - ecache linesize
714 * UltraSPARC-IIe processor supports both 4-way set associative
736 mov HB_ECACHE_FLUSH_CNT-1, %g5
738 sub %o1, %o2, %g3 ! start from last entry
775 * on a 64-byte boundary. The corresponding AFSR value is also read for each
781 * reading - not really possible, but we'll live with it for now.
783 * appropriate actions if the important bits are non-zero.
790 * i0: In: 32-bit e$ index
794 * i4: In: addr of accumulated afsr - may be null
797 save %sp, -SA(MINFRAME), %sp
812 ldxa [%g0]ASI_AFSR, %i0 ! grab the old-afsr before tag read
813 stx %i0, [%i3] ! write back the old-afsr
822 ldxa [%g0]ASI_AFSR, %i0 ! grab the old-afsr before clearing
867 * %g2: [ 52:43 UDB lower | 42:33 UDB upper | 32:0 afsr ] - arg #3/arg #1
868 * %g3: [ 40:4 afar ] - sys_trap->have_win: arg #4/arg #2
891 andn %g2, 0x1, %g2 ! clear bit 0 - CEEN
974 * %g3: [ 63:53 tt | 52:43 UDB_L | 42:33 UDB_U | 32:0 afsr ] - arg #3/arg #1
975 * %g2: [ 40:4 afar ] - sys_trap->have_win: arg #4/arg #2
1051 sub %g0, 1, %g4
1103 * NB - In Spitfire cpus, when reading a tte from the hardware, we
1104 * need to clear [42-41] because the general definitions in pte.h
1105 * define the PA to be [42-13] whereas Spitfire really uses [40-13].
1161 * Clear the NPT (non-privileged trap) bit in the %tick
1169 rdpr %pstate, %g1 /* save processor state */
1187 wrpr %g0, %g1, %pstate /* restore processor state */
1193 * %o0: In: 32-bit E$ index
1194 * Out: 64-bit E$ tag value
1195 * %o1: In: 64-bit AFSR value after clearing sticky bits
1245 * %o0: In: 32-bit E$ index
1246 * Out: 64-bit accumulated AFSR
1306 * scrubphys - Pass in the aligned physical memory address that you want
1334 sub %o3, 1, %o3 ! -1 == mask
1349 * UltraSPARC-IIe processor supports both 4-way set associative
1357 * aliased address and load at set-size stride, wrapping around
1358 * at 2*ecache-size boundary and skipping fault physical address.
1364 * %o5 physaddr - ecache_flushaddr
1367 * %g3 E$ flush address range mask (i.e. 2 * E$ -1)
1378 sub %g3, 1, %g3 ! 2 * ecachesize -1 == mask
1397 ! aliased address. at set-size stride, wrapping at 2*ecache_size
1400 mov HB_PHYS_FLUSH_CNT-1, %g4 ! #loads to flush phys addr
1401 sub %o0, %o3, %o5 ! physaddr - ecache_flushaddr
1432 * clearphys - Pass in the aligned physical memory address that you want
1433 * to push out, as a 64 byte block of zeros, from the ecache zero-filled.
1437 * TBD - Hummingbird may need similar protection
1446 sub %o3, 1, %o3 ! -1 == mask
1462 sub %o2, 8, %o2 ! get offset of last double word in ecache line
1465 sub %o2, 8, %o2
1477 * UltraSPARC-IIe processor supports both 4-way set associative
1485 * aliased address and load at set-size stride, wrapping around
1486 * at 2*ecache-size boundary and skipping fault physical address.
1492 * %o5 physaddr - ecache_flushaddr
1495 * %g3 E$ flush address range mask (i.e. 2 * E$ -1)
1507 sub %g3, 1, %g3 ! 2 * ecachesize -1 == mask
1528 sub %o2, 8, %o2 ! get offset of last double word in ecache line
1531 sub %o2, 8, %o2
1536 ! aliased address. at set-size stride, wrapping at 2*ecache_size
1539 mov HB_PHYS_FLUSH_CNT-1, %g4 ! #loads to flush phys addr
1540 sub %o0, %o3, %o5 ! physaddr - ecache_flushaddr
1570 * flushecacheline - This is a simpler version of scrubphys
1575 * data corruption - we are guarantee that the hw will write
1584 sub %o3, 1, %o3 ! -1 == mask
1603 * UltraSPARC-IIe processor supports both 4-way set associative
1611 * aliased address and load at set-size stride, wrapping around
1612 * at 2*ecache-size boundary and skipping fault physical address.
1618 * %o5 physaddr - ecache_flushaddr
1621 * %g3 E$ flush address range mask (i.e. 2 * E$ -1)
1632 sub %g3, 1, %g3 ! 2 * ecachesize -1 == mask
1655 ! aliased address. at set-size stride, wrapping at 2*ecache_size
1658 mov HB_PHYS_FLUSH_CNT-1, %g5 ! #loads to flush physaddr
1659 sub %o0, %o3, %o5 ! physaddr - ecache_flushaddr
1692 ! %g1 - inum
1695 ! %g2, %g3, %g5 - scratch
1696 ! %g4 - ptr. to spitfire_scrub_misc ec_scrub_outstanding.
1697 ! %g6 - setsoftint_tl1 address
1706 ! increment - we're at tl1
1710 st %g3, [%g4] ! delay - store incremented counter
1711 jmp %g6 ! setsoftint_tl1(%g1) - queue intr_vec
1804 save %sp, -SA(MINFRAME + 4), %sp
1815 st %f0, [%fp + STACK_BIAS - 4] ! save %f0 to the stack
1820 * (not kernel data, don't worry) or user floating-point data
1833 ld [%fp + STACK_BIAS - 4], %f0 ! restore %f0
1848 ld [%fp + STACK_BIAS - 4], %f0 ! restore %f0
1854 * If tryagain is set (%i2) we tail-call dtrace_blksuword32_err()
1855 * which deals with watchpoints. Otherwise, just return -1.
1860 restore %g0, -1, %o0