Lines Matching full:g2
390 SFMMU_CPU_CNUM(%o1, %g1, %g2) /* %g1 = sfmmu cnum on this CPU */
426 CPU_INDEX(%g1, %g2)
428 set cpunodes, %g2
429 add %g1, %g2, %g1
430 lduh [%g1 + ITLB_SIZE], %g2 ! %g2 = # entries in ITLB
432 sub %g2, 1, %g2 ! %g2 = # entries in ITLB - 1
438 ITLB_FLUSH_UNLOCKED_UCTXS(I, %g2, %g3, %g4, %o2, %o3, %o4, %o5)
456 * %g2 = sfmmup
463 SFMMU_CPU_CNUM(%g2, %g3, %g4) /* %g3 = sfmmu cnum on this CPU */
482 * %g2 = <sfmmup58 | pgcnt6>
497 and %g4, %g2, %g3 /* g3 = pgcnt - 1 */
500 andn %g2, SFMMU_PGCNT_MASK, %g2 /* g2 = sfmmup */
502 SFMMU_CPU_CNUM(%g2, %g5, %g6) ! %g5 = sfmmu cnum on this CPU
509 set MMU_PAGESIZE, %g2 /* g2 = pgsize */
517 add %g1, %g2, %g1 /* go to nextpage */
562 * %g1 = pfnum, %g2 = color
564 DCACHE_FLUSHPAGE(%g1, %g2, %g3, %g4, %g5)
581 DCACHE_FLUSHCOLOR(%g1, %g2, %g3)
636 mov IDDR_1, %g2
643 stxa %o1, [%g2]ASI_INTR_DISPATCH
866 * 6. package data in %g2 and %g3 7. call cpu_ce_error vis sys_trap
867 * %g2: [ 52:43 UDB lower | 42:33 UDB upper | 32:0 afsr ] - arg #3/arg #1
890 ldxa [%g0]ASI_ESTATE_ERR, %g2
891 andn %g2, 0x1, %g2 ! clear bit 0 - CEEN
892 stxa %g2, [%g0]ASI_ESTATE_ERR
896 ldxa [%g0]ASI_AFAR, %g2 ! save afar in g2
971 * 6. package data in %g2 and %g3 7. disable all cpu errors, because
975 * %g2: [ 40:4 afar ] - sys_trap->have_win: arg #4/arg #2
986 ldxa [%g0]ASI_AFAR, %g2 ! save afar in g2
1035 ldxa [%g0]ASI_AFAR, %g2 ! read afar
1112 sethi %hi(FLUSH_ADDR), %g2
1115 flush %g2
1118 set TTE_SPITFIRE_PFNHI_CLEAR, %g2 ! spitfire only
1119 sllx %g2, TTE_SPITFIRE_PFNHI_SHIFT, %g2 ! see comment above
1120 andn %g1, %g2, %g1 ! for details
1122 ldxa [%o0]ASI_ITLB_TAGREAD, %g2
1124 andn %g2, %o4, %o5
1132 sethi %hi(FLUSH_ADDR), %g2
1135 flush %g2
1138 set TTE_SPITFIRE_PFNHI_CLEAR, %g2 ! spitfire only
1139 sllx %g2, TTE_SPITFIRE_PFNHI_SHIFT, %g2 ! see comment above
1140 andn %g1, %g2, %g1 ! itlb_rd_entry
1142 ldxa [%o0]ASI_DTLB_TAGREAD, %g2
1144 andn %g2, %o4, %o5
1172 rdpr %tick, %g2 /* get tick register */
1173 brgez,pn %g2, 1f /* if NPT bit off, we're done */
1179 rdpr %tick, %g2 /* get tick register */
1180 wrpr %g3, %g2, %tick /* write tick register, */
1366 * %g2 E$ set size
1374 udivx %o2, %g5, %g2 ! set size (i.e. ecache_size/#sets)
1406 add %g5, %g2, %g5 ! calculate offset in next set
1494 * %g2 E$ set size
1503 udivx %o2, %g5, %g2 ! set size (i.e. ecache_size/#sets)
1545 add %g5, %g2, %g5 ! calculate offset in next set
1620 * %g2 E$ set size
1628 udivx %o2, %g5, %g2 ! set size (i.e. ecache_size/#sets)
1663 add %o1, %g2, %o1 ! calculate offset in next set
1695 ! %g2, %g3, %g5 - scratch
1700 set SFPR_SCRUB_MISC + EC_SCRUB_OUTSTANDING, %g2
1701 GET_CPU_PRIVATE_PTR(%g2, %g4, %g5, 1f);
1702 ld [%g4], %g2 ! cpu's ec_scrub_outstanding.
1708 add %g2, 0x1, %g3
1709 brnz,pn %g2, 1f ! no need to enqueue more intr_vec