Lines Matching refs:g3
163 sethi %hi(ksfmmup), %g3
164 ldx [%g3 + %lo(ksfmmup)], %g3
165 cmp %g3, %g2
178 SFMMU_CPU_CNUM(%g2, %g6, %g3) ! %g6 = sfmmu cnum on this CPU
213 and %g4, %g2, %g3 /* g3 = pgcnt - 1 */
214 add %g3, 1, %g3 /* g3 = pgcnt */
234 deccc %g3 /* decr pgcnt */
267 deccc %g3 /* decr pgcnt */
364 mov IDDR_2, %g3
375 stxa %o2, [%g3]ASI_INTR_DISPATCH
711 mov %g0, %g3 ;\
970 rdpr %tt, %g3
982 rdpr %tt, %g3
997 rdpr %tt, %g3
1072 OPL_TRAPTRACE(%g1, %g2, %g3, opl_sync_trap_lb)
1077 mov MMU_SFSR, %g3
1078 ldxa [%g3]ASI_IMMU, %g1 ! IAE trap case tt = 0xa
1083 sethi %hi(SFSR_UE|SFSR_BERR|SFSR_TO), %g3
1084 andcc %g1, %g3, %g0 ! Check for UE/BERR/TO errors
1087 set OPL_MMU_SFPAR, %g3 ! In the UE/BERR/TO cases, use
1089 ldxa [%g3]ASI_IMMU, %g2
1091 ldxa [%g3]ASI_DMMU, %g1 ! DAE trap case tt = 0x32
1098 sethi %hi(SFSR_UE|SFSR_BERR|SFSR_TO), %g3
1099 andcc %g1, %g3, %g0 ! Check UE/BERR/TO for valid SFPAR
1103 sethi %hi(SFSR_TLB_PRT), %g3
1104 andcc %g1, %g3, %g0
1112 FLUSH_ALL_TLB(%g3)
1113 set OPL_SCRATCHPAD_ERRLOG, %g3
1114 ldxa [%g3]ASI_SCRATCHPAD, %g3 ! Read errlog scratchreg
1115 and %g3, ERRLOG_REG_NUMERR_MASK, %g3! Extract the error count
1116 subcc %g3, 1, %g0 ! Subtract one from the count
1119 LOG_SYNC_REG(%g1, %g2, %g3) ! Record into the error log
1120 set OPL_SCRATCHPAD_ERRLOG, %g3
1121 ldxa [%g3]ASI_SCRATCHPAD, %g2
1123 stxa %g2, [%g3]ASI_SCRATCHPAD ! update the errlog scratchreg
1124 OPL_RESTORE_GLOBAL(%g1, %g2, %g3)
1127 sethi %hi(SFSR_TLB_MUL), %g3
1128 andcc %g1, %g3, %g0
1131 FLUSH_ALL_TLB(%g3)
1140 LOG_SYNC_REG(%g1, %g2, %g3) ! Record into the error log
1167 RESET_USER_RTT_REGS(%g2, %g3, opl_sync_trap_resetskip)
1169 mov %g5, %g3 ! pass SFSR to the 3rd arg
1178 mov %g5, %g3 ! pass SFSR to the 3rd arg
1240 ldxa [%g2]ASI_AFSR, %g3 ! Enable Weak error
1241 or %g3, ASI_ECR_WEAK_ED, %g3 ! detect mode to prevent
1242 stxa %g3, [%g2]ASI_AFSR ! potential error storms
1261 FLUSH_ALL_TLB(%g3)
1262 rdpr %tl, %g3 ! Read TL
1263 cmp %g3, 1 ! Check if we came from TL=0
1271 set OPL_SCRATCHPAD_ERRLOG, %g3
1272 ldxa [%g3]ASI_SCRATCHPAD, %g2 ! Read errlog scratch reg
1273 and %g2, ERRLOG_REG_NUMERR_MASK, %g3! Extract error count and
1274 subcc %g3, 1, %g3 ! subtract one from it
1278 set OPL_SCRATCHPAD_ERRLOG, %g3 ! and write back the updated
1279 stxa %g2, [%g3]ASI_SCRATCHPAD ! count into the errlog reg
1280 LOG_UGER_REG(%g1, %g2, %g3) ! Log the error info
1282 OPL_TRAPTRACE(%g1, %g2, %g3, opl_uger_trap_lb)
1300 IAG_CRE(%g2, %g3)
1302 ldxa [%g2]ASI_AFSR, %g3
1303 or %g3, ASI_ECR_WEAK_ED, %g3
1304 stxa %g3, [%g2]ASI_AFSR
1319 RESET_MMU_REGS(%g2, %g3, %g4)
1340 RESET_MMU_REGS(%g2, %g3, %g4)
1358 RESET_PREV_TSTATE(%g2, %g3, opl_uger_tstate_1)
1382 LOG_UGER_REG(%g1, %g3, %g4)
1388 LOG_UGER_REG(%g1, %g3, %g4)
1389 RESET_TO_PRIV(%g1, %g3, %g4, %l0)
1398 rdpr %tl, %g3 ! arg #2
1467 mov T_FLUSHW, %g3
1485 mov T_FLUSHW, %g3
1505 OPL_SAVE_GLOBAL(%g1,%g2,%g3)
1506 sethi %hi(opl_sync_trap), %g3
1507 jmp %g3 + %lo(opl_sync_trap)
1516 sethi %hi(opl_uger_trap), %g3
1517 jmp %g3 + %lo(opl_uger_trap)
1526 sethi %hi(opl_ta3_trap), %g3
1527 jmp %g3 + %lo(opl_ta3_trap)
1536 sethi %hi(opl_cleanw_subr), %g3
1537 add %g3, %lo(opl_cleanw_subr), %g3
1538 jmpl %g3, %g7
1557 andn %g1, PSTATE_IE, %g3
1559 wrpr %g0, %g3, %pstate ! turn off interrupts
1727 andn %g1, PSTATE_IE, %g3 /* turn off */
1728 wrpr %g0, %g3, %pstate /* interrupts */
1731 mov 1, %g3 /* create mask */
1732 sllx %g3, 63, %g3 /* for NPT bit */
1737 wrpr %g3, %g2, %tick /* write tick register, */
1742 mov 1, %g3 /* create mask */
1743 sllx %g3, 63, %g3 /* for NPT bit */
1748 wr %g3, %g2, STICK /* write stick register, */