Lines Matching refs:g2
111 SFMMU_CPU_CNUM(%o1, %g1, %g2) ! %g1 = sfmmu cnum on this CPU
165 cmp %g3, %g2
178 SFMMU_CPU_CNUM(%g2, %g6, %g3) ! %g6 = sfmmu cnum on this CPU
180 ldub [%g2 + SFMMU_CEXT], %g4 ! %g4 = sfmmup->cext
186 srlx %g5, CTXREG_NEXT_SHIFT, %g2 ! %g2 = nucleus pgsz
187 sllx %g2, CTXREG_NEXT_SHIFT, %g2 ! preserve nucleus pgsz
188 or %g6, %g2, %g6 ! %g6 = nucleus pgsz | primary pgsz | cnum
213 and %g4, %g2, %g3 /* g3 = pgcnt - 1 */
216 andn %g2, SFMMU_PGCNT_MASK, %g2 /* g2 = sfmmup */
221 cmp %g4, %g2
227 set MMU_PAGESIZE, %g2 /* g2 = pgsize */
236 add %g1, %g2, %g1 /* next page */
245 SFMMU_CPU_CNUM(%g2, %g5, %g6) ! %g5 = sfmmu cnum on this CPU
249 ldub [%g2 + SFMMU_CEXT], %g4 ! %g4 = sfmmup->cext
255 srlx %g6, CTXREG_NEXT_SHIFT, %g2 /* %g2 = nucleus pgsz */
256 sllx %g2, CTXREG_NEXT_SHIFT, %g2 /* preserve nucleus pgsz */
257 or %g5, %g2, %g5 /* %g5 = nucleus pgsz | primary pgsz | cnum */
260 set MMU_PAGESIZE, %g2 /* g2 = pgsize */
269 add %g1, %g2, %g1 /* next page */
363 mov IDDR_1, %g2
370 stxa %o1, [%g2]ASI_INTR_DISPATCH
389 sll %o1, IDCR_BN_SHIFT, %g2 ! IDCR<28:24> = b/n pair
391 or %g1, %g2, %g1
710 mov %g0, %g2 ;\
1072 OPL_TRAPTRACE(%g1, %g2, %g3, opl_sync_trap_lb)
1081 rdpr %tpc, %g2 ! use %tpc for faultaddr instead
1086 rdpr %tpc, %g2 ! use %tpc as faultaddr
1089 ldxa [%g3]ASI_IMMU, %g2
1094 mov MMU_SFAR, %g2 ! set %g2 to use SFAR
1096 ldxa [%g2]ASI_DMMU, %g2 ! for faultaddr
1100 movnz %xcc, OPL_MMU_SFPAR, %g2 ! Use SFPAR instead of SFAR for
1101 ldxa [%g2]ASI_DMMU, %g2 ! faultaddr
1119 LOG_SYNC_REG(%g1, %g2, %g3) ! Record into the error log
1121 ldxa [%g3]ASI_SCRATCHPAD, %g2
1122 sub %g2, 1, %g2 ! decrement error counter by 1
1123 stxa %g2, [%g3]ASI_SCRATCHPAD ! update the errlog scratchreg
1124 OPL_RESTORE_GLOBAL(%g1, %g2, %g3)
1139 mov %g2, %g6 ! %g6 = SFPAR or SFAR/tpc
1140 LOG_SYNC_REG(%g1, %g2, %g3) ! Record into the error log
1161 sethi %hi(SFSR_UE), %g2
1162 andcc %g5, %g2, %g0 ! check for UE
1167 RESET_USER_RTT_REGS(%g2, %g3, opl_sync_trap_resetskip)
1170 mov %g6, %g2 ! pass SFAR to the 2nd arg
1179 mov %g6, %g2 ! pass SFAR to the 2nd arg
1232 set ASI_UGERSR, %g2
1233 ldxa [%g2]ASI_AFSR, %g1 ! Read the UGERSR reg
1235 set UGESR_MULTI, %g2
1236 andcc %g1, %g2, %g0 ! Check for Multi-errs
1239 set AFSR_ECR, %g2
1240 ldxa [%g2]ASI_AFSR, %g3 ! Enable Weak error
1242 stxa %g3, [%g2]ASI_AFSR ! potential error storms
1247 set UGESR_CAN_RECOVER, %g2 ! Check for recoverable
1248 andcc %g1, %g2, %g0 ! errors i.e.IUG_DTLB,
1266 srlx %g1, 4, %g2 ! shift INSTEND[5:4] -> [1:0]
1267 and %g2, 3, %g2 ! extract the shifted [1:0] bits
1268 cmp %g2, 3 ! check if INSTEND is recoverable
1272 ldxa [%g3]ASI_SCRATCHPAD, %g2 ! Read errlog scratch reg
1273 and %g2, ERRLOG_REG_NUMERR_MASK, %g3! Extract error count and
1277 sub %g2, 1, %g2 ! Subtract one from the count
1279 stxa %g2, [%g3]ASI_SCRATCHPAD ! count into the errlog reg
1280 LOG_UGER_REG(%g1, %g2, %g3) ! Log the error info
1282 OPL_TRAPTRACE(%g1, %g2, %g3, opl_uger_trap_lb)
1296 set UGESR_IAUG_CRE, %g2
1297 andcc %g1, %g2, %g0
1300 IAG_CRE(%g2, %g3)
1301 set AFSR_ECR, %g2
1302 ldxa [%g2]ASI_AFSR, %g3
1304 stxa %g3, [%g2]ASI_AFSR
1309 set UGESR_IAUG_TSBCTXT, %g2
1310 andcc %g1, %g2, %g0
1313 GET_CPU_IMPL(%g2)
1314 cmp %g2, JUPITER_IMPL
1317 RESET_SHARED_CTXT(%g2)
1319 RESET_MMU_REGS(%g2, %g3, %g4)
1324 set UGESR_IUG_TSBP, %g2
1325 andcc %g1, %g2, %g0
1328 GET_CPU_IMPL(%g2)
1329 cmp %g2, JUPITER_IMPL
1332 RESET_TSB_PREFETCH(%g2)
1334 RESET_TSB_TAGPTR(%g2)
1340 RESET_MMU_REGS(%g2, %g3, %g4)
1345 set UGESR_IUG_PSTATE, %g2
1346 andcc %g1, %g2, %g0
1349 RESET_CUR_TSTATE(%g2)
1354 set UGESR_IUG_TSTATE, %g2
1355 andcc %g1, %g2, %g0
1358 RESET_PREV_TSTATE(%g2, %g3, opl_uger_tstate_1)
1363 set UGESR_IUG_F, %g2
1364 andcc %g1, %g2, %g0
1367 CLEAR_FPREGS(%g2)
1372 set UGESR_IUG_R, %g2
1373 andcc %g1, %g2, %g0
1376 CLEAR_GEN_REGS(%g2, opl_uger_r_1)
1381 mov %g1, %g2 ! %g2 = arg #1
1387 mov %g1, %g2 ! %g2 = arg #1
1470 SAVE_WREGS(%g2, %g6)
1475 RESTORE_WREGS(%g2, %g5)
1488 SAVE_WREGS(%g2, %g6)
1493 RESTORE_WREGS(%g2, %g5)
1505 OPL_SAVE_GLOBAL(%g1,%g2,%g3)
1729 rdpr %tick, %g2 /* get tick register */
1730 brgez,pn %g2, 1f /* if NPT bit off, we're done */
1736 rdpr %tick, %g2 /* get tick register */
1737 wrpr %g3, %g2, %tick /* write tick register, */
1740 rd STICK, %g2 /* get stick register */
1741 brgez,pn %g2, 3f /* if NPT bit off, we're done */
1747 rd STICK, %g2 /* get stick register */
1748 wr %g3, %g2, STICK /* write stick register, */