Lines Matching refs:nrd
86 uint_t nrs1, nrs2, nrd; /* Register number fields. */ in vis_fpu_simulator() local
98 nrd = pinst.rd; in vis_fpu_simulator()
105 if ((nrd & 1) == 1) in vis_fpu_simulator()
106 nrd = (nrd & 0x1e) | 0x20; in vis_fpu_simulator()
185 _fp_pack_extword(pfpsd, &lusr, nrd); in vis_fpu_simulator()
189 _fp_pack_word(pfpsd, &usr, nrd); in vis_fpu_simulator()
195 _fp_pack_extword(pfpsd, &lusr, nrd); in vis_fpu_simulator()
201 _fp_pack_word(pfpsd, &usr, nrd); in vis_fpu_simulator()
207 _fp_pack_extword(pfpsd, &lusr, nrd); in vis_fpu_simulator()
213 _fp_pack_word(pfpsd, &usr, nrd); in vis_fpu_simulator()
218 _fp_pack_extword(pfpsd, &lusr, nrd); in vis_fpu_simulator()
223 _fp_pack_word(pfpsd, &usr, nrd); in vis_fpu_simulator()
229 _fp_pack_extword(pfpsd, &lusr, nrd); in vis_fpu_simulator()
235 _fp_pack_word(pfpsd, &usr, nrd); in vis_fpu_simulator()
240 _fp_pack_extword(pfpsd, &lusr, nrd); in vis_fpu_simulator()
245 _fp_pack_word(pfpsd, &usr, nrd); in vis_fpu_simulator()
251 _fp_pack_extword(pfpsd, &lusr, nrd); in vis_fpu_simulator()
257 _fp_pack_word(pfpsd, &usr, nrd); in vis_fpu_simulator()
263 _fp_pack_extword(pfpsd, &lusr, nrd); in vis_fpu_simulator()
269 _fp_pack_word(pfpsd, &usr, nrd); in vis_fpu_simulator()
275 _fp_pack_extword(pfpsd, &lusr, nrd); in vis_fpu_simulator()
281 _fp_pack_word(pfpsd, &usr, nrd); in vis_fpu_simulator()
287 _fp_pack_extword(pfpsd, &lusr, nrd); in vis_fpu_simulator()
293 _fp_pack_word(pfpsd, &usr, nrd); in vis_fpu_simulator()
297 _fp_pack_extword(pfpsd, &lusr, nrd); in vis_fpu_simulator()
301 _fp_pack_word(pfpsd, &usr, nrd); in vis_fpu_simulator()
307 _fp_pack_extword(pfpsd, &lusr, nrd); in vis_fpu_simulator()
313 _fp_pack_word(pfpsd, &usr, nrd); in vis_fpu_simulator()
317 _fp_pack_extword(pfpsd, &lusr, nrd); in vis_fpu_simulator()
321 _fp_pack_word(pfpsd, &usr, nrd); in vis_fpu_simulator()
327 _fp_pack_extword(pfpsd, &lusr, nrd); in vis_fpu_simulator()
333 _fp_pack_word(pfpsd, &usr, nrd); in vis_fpu_simulator()
339 _fp_pack_extword(pfpsd, &lusr, nrd); in vis_fpu_simulator()
345 _fp_pack_word(pfpsd, &usr, nrd); in vis_fpu_simulator()
349 _fp_pack_extword(pfpsd, &lusr, nrd); in vis_fpu_simulator()
353 _fp_pack_word(pfpsd, &usr, nrd); in vis_fpu_simulator()
378 uint_t nrs1, nrs2, nrd; /* Register number fields. */ in vis_edge() local
387 nrd = inst.rd; in vis_edge()
523 ftt = write_iureg(pfpsd, nrd, pregs, prw, &mask); in vis_edge()
555 uint_t nrs1, nrs2, nrd; /* Register number fields. */ in vis_array() local
563 nrd = inst.rd; in vis_array()
604 ftt = write_iureg(pfpsd, nrd, pregs, prw, &baddr); in vis_array()
620 uint_t nrs1, nrs2, nrd; /* Register number fields. */ in vis_alignaddr() local
627 nrd = inst.rd; in vis_alignaddr()
637 ftt = write_iureg(pfpsd, nrd, pregs, prw, &r); in vis_alignaddr()
667 uint_t nrs1, nrs2, nrd; /* Register number fields. */ in vis_bmask() local
674 nrd = inst.rd; in vis_bmask()
683 ftt = write_iureg(pfpsd, nrd, pregs, prw, &ea); in vis_bmask()
702 uint_t nrs1, nrs2, nrd; /* Register number fields. */ in vis_fpaddsub() local
716 nrd = inst.rd; in vis_fpaddsub()
722 if ((nrd & 1) == 1) in vis_fpaddsub()
723 nrd = (nrd & 0x1e) | 0x20; in vis_fpaddsub()
732 _fp_pack_extword(pfpsd, &lrd.ll, nrd); in vis_fpaddsub()
740 _fp_pack_word(pfpsd, &krd.i, nrd); in vis_fpaddsub()
748 _fp_pack_extword(pfpsd, &lrd.ll, nrd); in vis_fpaddsub()
754 _fp_pack_word(pfpsd, &krd.i, nrd); in vis_fpaddsub()
762 _fp_pack_extword(pfpsd, &lrd.ll, nrd); in vis_fpaddsub()
770 _fp_pack_word(pfpsd, &krd.i, nrd); in vis_fpaddsub()
778 _fp_pack_extword(pfpsd, &lrd.ll, nrd); in vis_fpaddsub()
784 _fp_pack_word(pfpsd, &krd.i, nrd); in vis_fpaddsub()
800 uint_t nrs1, nrs2, nrd; /* Register number fields. */ in vis_fcmp() local
812 nrd = inst.rd; in vis_fcmp()
895 ftt = write_iureg(pfpsd, nrd, pregs, prw, &krd.ll); in vis_fcmp()
907 uint_t nrs1, nrs2, nrd; /* Register number fields. */ in vis_fmul() local
926 nrd = inst.rd; in vis_fmul()
928 if ((nrd & 1) == 1) /* fix register encoding */ in vis_fmul()
929 nrd = (nrd & 0x1e) | 0x20; in vis_fmul()
948 _fp_pack_extword(pfpsd, &lrd.ll, nrd); in vis_fmul()
963 _fp_pack_extword(pfpsd, &lrd.ll, nrd); in vis_fmul()
978 _fp_pack_extword(pfpsd, &lrd.ll, nrd); in vis_fmul()
1001 _fp_pack_extword(pfpsd, &lrd.ll, nrd); in vis_fmul()
1020 _fp_pack_extword(pfpsd, &lrd.ll, nrd); in vis_fmul()
1033 _fp_pack_extword(pfpsd, &lrd.ll, nrd); in vis_fmul()
1044 _fp_pack_extword(pfpsd, &lrd.ll, nrd); in vis_fmul()
1059 uint_t nrs1, nrs2, nrd; /* Register number fields. */ in vis_fpixel() local
1079 nrd = inst.rd; in vis_fpixel()
1081 if ((nrd & 1) == 1) /* fix register encoding */ in vis_fpixel()
1082 nrd = (nrd & 0x1e) | 0x20; in vis_fpixel()
1107 _fp_pack_word(pfpsd, &krd.i, nrd); in vis_fpixel()
1134 _fp_pack_extword(pfpsd, &lrd.ll, nrd); in vis_fpixel()
1157 _fp_pack_word(pfpsd, &krd.i, nrd); in vis_fpixel()
1166 _fp_pack_extword(pfpsd, &lrd.ll, nrd); in vis_fpixel()
1176 _fp_pack_extword(pfpsd, &lrd.ll, nrd); in vis_fpixel()
1193 uint_t nrs1, nrs2, nrd; /* Register number fields. */ in vis_pdist() local
1203 nrd = pinst.rd; in vis_pdist()
1209 if ((nrd & 1) == 1) in vis_pdist()
1210 nrd = (nrd & 0x1e) | 0x20; in vis_pdist()
1217 _fp_unpack_extword(pfpsd, &lrd.ll, nrd); in vis_pdist()
1232 _fp_pack_extword(pfpsd, &lrd.ll, nrd); in vis_pdist()
1235 (void) write_iureg(pfpsd, nrd, pregs, prw, &lrd.ll); in vis_pdist()
1248 uint_t nrs1, nrs2, nrd; /* Register number fields. */ in vis_faligndata() local
1258 nrd = pinst.rd; in vis_faligndata()
1263 if ((nrd & 1) == 1) in vis_faligndata()
1264 nrd = (nrd & 0x1e) | 0x20; in vis_faligndata()
1278 _fp_pack_extword(pfpsd, &lrd.ll, nrd); in vis_faligndata()
1292 uint_t nrs1, nrs2, nrd; /* Register number fields. */ in vis_bshuffle() local
1303 nrd = pinst.rd; in vis_bshuffle()
1308 if ((nrd & 1) == 1) in vis_bshuffle()
1309 nrd = (nrd & 0x1e) | 0x20; in vis_bshuffle()
1340 _fp_pack_extword(pfpsd, &lrd.ll, nrd); in vis_bshuffle()
1437 uint_t nrs1, nrs2, nrd; /* Register number fields. */ in vis_prtl_fst() local
1452 nrd = inst.rd; in vis_prtl_fst()
1453 if ((nrd & 1) == 1) /* fix register encoding */ in vis_prtl_fst()
1454 nrd = (nrd & 0x1e) | 0x20; in vis_prtl_fst()
1480 _fp_unpack_extword(pfpsd, &k.f.FPU_DREG_FIELD, nrd); in vis_prtl_fst()
1496 _fp_unpack_extword(pfpsd, &k.f.FPU_DREG_FIELD, nrd); in vis_prtl_fst()
1512 _fp_unpack_extword(pfpsd, &k.f.FPU_DREG_FIELD, nrd); in vis_prtl_fst()
1528 _fp_unpack_extword(pfpsd, &k.f.FPU_DREG_FIELD, nrd); in vis_prtl_fst()
1547 _fp_unpack_extword(pfpsd, &k.f.FPU_DREG_FIELD, nrd); in vis_prtl_fst()
1563 _fp_unpack_extword(pfpsd, &k.f.FPU_DREG_FIELD, nrd); in vis_prtl_fst()
1599 uint_t nrs1, nrs2, nrd; /* Register number fields. */ in vis_short_fls() local
1619 nrd = inst.rd; in vis_short_fls()
1620 if ((nrd & 1) == 1) /* fix register encoding */ in vis_short_fls()
1621 nrd = (nrd & 0x1e) | 0x20; in vis_short_fls()
1654 _fp_pack_extword(pfpsd, &k.f.FPU_DREG_FIELD, nrd); in vis_short_fls()
1656 _fp_unpack_extword(pfpsd, &k.f.FPU_DREG_FIELD, nrd); in vis_short_fls()
1671 _fp_pack_extword(pfpsd, &k.f.FPU_DREG_FIELD, nrd); in vis_short_fls()
1673 _fp_unpack_extword(pfpsd, &k.f.FPU_DREG_FIELD, nrd); in vis_short_fls()
1689 _fp_pack_extword(pfpsd, &k.f.FPU_DREG_FIELD, nrd); in vis_short_fls()
1691 _fp_unpack_extword(pfpsd, &k.f.FPU_DREG_FIELD, nrd); in vis_short_fls()
1718 uint_t nrs1, nrs2, nrd; /* Register number fields. */ in vis_blk_fldst() local
1735 nrd = inst.rd; in vis_blk_fldst()
1736 if ((nrd & 1) == 1) /* fix register encoding */ in vis_blk_fldst()
1737 nrd = (nrd & 0x1e) | 0x20; in vis_blk_fldst()
1740 if ((nrd & 0xf) != 0) in vis_blk_fldst()
1778 for (i = 0; i < 8; i++, nrd += 2) { in vis_blk_fldst()
1789 nrd); in vis_blk_fldst()
1793 for (i = 0; i < 8; i++, nrd += 2) { in vis_blk_fldst()
1795 nrd); in vis_blk_fldst()
1833 uint_t nrd; in vis_rdgsr() local
1837 nrd = pinst.rd; in vis_rdgsr()
1840 ftt = write_iureg(pfpsd, nrd, pregs, prw, &r); in vis_rdgsr()